stm32mp157c-osd32mp1-brk.dts 24 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
  2. /*
  3. * Copyright (C) Octavo Systems LLC 2020 - All Rights Reserved
  4. */
  5. /* For more information on Device Tree configuration, please refer to
  6. * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
  7. */
  8. /dts-v1/;
  9. #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  10. #include "stm32mp157.dtsi"
  11. #include "stm32mp15xc.dtsi"
  12. #include "stm32mp15xxac-pinctrl.dtsi"
  13. #include "stm32mp157-m4-srm.dtsi"
  14. #include <dt-bindings/mfd/st,stpmic1.h>
  15. #include <dt-bindings/rtc/rtc-stm32.h>
  16. / {
  17. model = "Octavo OSD32MP1 BRK board";
  18. compatible = "st,stm32mp157c-osd32mp1-brk", "st,stm32mp157";
  19. memory@c0000000 {
  20. device_type = "memory";
  21. reg = <0xc0000000 0x20000000>;
  22. };
  23. reserved-memory {
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. ranges;
  27. mcuram2:mcuram2@10000000{
  28. compatible = "shared-dma-pool";
  29. reg = <0x10000000 0x40000>;
  30. no-map;
  31. };
  32. vdev0vring0:vdev0vring0@10040000{
  33. compatible = "shared-dma-pool";
  34. reg = <0x10040000 0x1000>;
  35. no-map;
  36. };
  37. vdev0vring1:vdev0vring1@10041000{
  38. compatible = "shared-dma-pool";
  39. reg = <0x10041000 0x1000>;
  40. no-map;
  41. };
  42. vdev0buffer:vdev0buffer@10042000{
  43. compatible = "shared-dma-pool";
  44. reg = <0x10042000 0x4000>;
  45. no-map;
  46. };
  47. mcuram:mcuram@30000000{
  48. compatible = "shared-dma-pool";
  49. reg = <0x30000000 0x40000>;
  50. no-map;
  51. };
  52. retram:retram@38000000{
  53. compatible = "shared-dma-pool";
  54. reg = <0x38000000 0x10000>;
  55. no-map;
  56. };
  57. gpu_reserved:gpu@da000000{
  58. reg = <0xda000000 0x4000000>;
  59. no-map;
  60. };
  61. optee_memory:optee@0xde000000{
  62. reg = <0xde000000 0x02000000>;
  63. no-map;
  64. status = "okay";
  65. };
  66. };
  67. led{
  68. compatible = "gpio-leds";
  69. red1{
  70. label = "LED1_RED";
  71. gpios = <&gpioz 6 GPIO_ACTIVE_LOW>;
  72. linux,default-trigger = "heartbeat";
  73. status = "okay";
  74. default-state = "off";
  75. };
  76. green1{
  77. label = "LED1_GRN";
  78. gpios = <&gpioz 7 GPIO_ACTIVE_LOW>;
  79. status = "okay";
  80. default-state = "on";
  81. };
  82. red2{
  83. label = "LED2_RED";
  84. gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
  85. status = "okay";
  86. default-state = "off";
  87. };
  88. green2{
  89. label = "LED2_GRN";
  90. gpios = <&gpioi 9 GPIO_ACTIVE_LOW>;
  91. default-state = "off";
  92. };
  93. };
  94. usb_phy_tuning:usb-phy-tuning{
  95. st,hs-dc-level = <2>;
  96. st,fs-rftime-tuning;
  97. st,hs-rftime-reduction;
  98. st,hs-current-trim = <15>;
  99. st,hs-impedance-trim = <1>;
  100. st,squelch-level = <3>;
  101. st,hs-rx-offset = <2>;
  102. st,no-lsfs-sc;
  103. };
  104. vin:vin{
  105. compatible = "regulator-fixed";
  106. regulator-name = "vin";
  107. regulator-min-microvolt = <5000000>;
  108. regulator-max-microvolt = <5000000>;
  109. regulator-always-on;
  110. };
  111. aliases{
  112. serial0 = &uart4;
  113. serial2 = &usart2;
  114. serial5 = &uart5;
  115. serial7 = &uart7;
  116. serial1 = &uart8;
  117. };
  118. chosen{
  119. stdout-path = "serial0:115200n8";
  120. };
  121. clocks {
  122. #ifndef CONFIG_STM32MP1_TRUSTED
  123. clk_lsi: clk-lsi {
  124. clock-frequency = <32000>;
  125. };
  126. clk_hsi: clk-hsi {
  127. clock-frequency = <64000000>;
  128. };
  129. clk_csi: clk-csi {
  130. clock-frequency = <4000000>;
  131. };
  132. clk_lse: clk-lse {
  133. clock-frequency = <32768>;
  134. };
  135. clk_hse: clk-hse {
  136. clock-frequency = <24000000>;
  137. };
  138. #endif /*CONFIG_STM32MP1_TRUSTED*/
  139. };
  140. }; /*root*/
  141. &pinctrl {
  142. u-boot,dm-pre-reloc;
  143. i2c1_pins_mx: i2c1-0 {
  144. pins {
  145. pinmux = <STM32_PINMUX('H', 11, AF5)>, /* I2C1_SCL */
  146. <STM32_PINMUX('H', 12, AF5)>; /* I2C1_SDA */
  147. bias-disable;
  148. drive-open-drain;
  149. slew-rate = <0>;
  150. };
  151. };
  152. i2c1_pins_sleep_mx: i2c1-1 {
  153. pins {
  154. pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* I2C1_SCL */
  155. <STM32_PINMUX('H', 12, ANALOG)>; /* I2C1_SDA */
  156. };
  157. };
  158. i2c2_pins_mx: i2c2-0 {
  159. pins {
  160. pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
  161. <STM32_PINMUX('G', 15, AF4)>; /* I2C2_SDA */
  162. bias-disable;
  163. drive-open-drain;
  164. slew-rate = <0>;
  165. };
  166. };
  167. i2c2_pins_sleep_mx: i2c2-1 {
  168. pins {
  169. pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
  170. <STM32_PINMUX('G', 15, ANALOG)>; /* I2C2_SDA */
  171. };
  172. };
  173. i2c5_pins_mx: i2c5-0 {
  174. pins {
  175. pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
  176. <STM32_PINMUX('D', 0, AF4)>; /* I2C5_SDA */
  177. bias-disable;
  178. drive-open-drain;
  179. slew-rate = <0>;
  180. };
  181. };
  182. i2c5_pins_sleep_mx: i2c5-1 {
  183. pins {
  184. pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
  185. <STM32_PINMUX('D', 0, ANALOG)>; /* I2C5_SDA */
  186. };
  187. };
  188. spi2_pins_mx: spi2-0 {
  189. pins1 {
  190. pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
  191. <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
  192. bias-disable;
  193. drive-push-pull;
  194. slew-rate = <1>;
  195. };
  196. pins2 {
  197. pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
  198. bias-disable;
  199. };
  200. };
  201. spi2_sleep_pins_mx: spi2-sleep-0 {
  202. pins {
  203. pinmux = <STM32_PINMUX('I', 1, ANALOG)>, /* SPI2_SCK */
  204. <STM32_PINMUX('I', 2, ANALOG)>, /* SPI2_MISO */
  205. <STM32_PINMUX('I', 3, ANALOG)>; /* SPI2_MOSI */
  206. };
  207. };
  208. spi4_pins_mx: spi4-0 {
  209. pins1 {
  210. pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
  211. <STM32_PINMUX('E', 14, AF5)>; /* SPI4_MOSI */
  212. bias-disable;
  213. drive-push-pull;
  214. slew-rate = <1>;
  215. };
  216. pins2 {
  217. pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
  218. bias-disable;
  219. };
  220. };
  221. spi4_sleep_pins_mx: spi4-sleep-0 {
  222. pins {
  223. pinmux = <STM32_PINMUX('E', 12, ANALOG)>, /* SPI2_SCK */
  224. <STM32_PINMUX('E', 13, ANALOG)>, /* SPI2_MISO */
  225. <STM32_PINMUX('E', 14, ANALOG)>; /* SPI2_MOSI */
  226. };
  227. };
  228. usart2_pins_mx: usart2-0 {
  229. pins1 {
  230. pinmux = <STM32_PINMUX('F', 5, AF7)>; /* USART2_TX */
  231. bias-disable;
  232. drive-push-pull;
  233. slew-rate = <0>;
  234. };
  235. pins2 {
  236. pinmux = <STM32_PINMUX('F', 4, AF7)>; /* USART2_RX */
  237. bias-disable;
  238. };
  239. };
  240. usart2_idle_pins_mx: usart2-idle-0 {
  241. pins1 {
  242. pinmux = <STM32_PINMUX('F', 5, ANALOG)>; /* USART2_TX */
  243. };
  244. pins2 {
  245. pinmux = <STM32_PINMUX('F', 4, AF7)>; /* USART2_RX */
  246. bias-disable;
  247. };
  248. };
  249. usart2_sleep_pins_mx: usart2-sleep-0 {
  250. pins {
  251. pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
  252. <STM32_PINMUX('F', 4, ANALOG)>; /* USART2_RX */
  253. };
  254. };
  255. uart5_pins_mx: uart5-0 {
  256. pins1 {
  257. pinmux = <STM32_PINMUX('B', 13, AF14)>; /* USART5_TX */
  258. bias-disable;
  259. drive-push-pull;
  260. slew-rate = <0>;
  261. };
  262. pins2 {
  263. pinmux = <STM32_PINMUX('B', 12, AF14)>; /* USART5_RX */
  264. bias-disable;
  265. };
  266. };
  267. uart5_idle_pins_mx: uart5-idle-0 {
  268. pins1 {
  269. pinmux = <STM32_PINMUX('B', 13, ANALOG)>; /* USART5_TX */
  270. };
  271. pins2 {
  272. pinmux = <STM32_PINMUX('B', 12, AF14)>; /* USART5_RX */
  273. bias-disable;
  274. };
  275. };
  276. uart5_sleep_pins_mx: uart5-sleep-0 {
  277. pins {
  278. pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* USART5_TX */
  279. <STM32_PINMUX('B', 12, ANALOG)>; /* USART5_RX */
  280. };
  281. };
  282. uart7_pins_mx: uart7-0 {
  283. pins1 {
  284. pinmux = <STM32_PINMUX('A', 15, AF13)>; /* USART7_TX */
  285. bias-disable;
  286. drive-push-pull;
  287. slew-rate = <0>;
  288. };
  289. pins2 {
  290. pinmux = <STM32_PINMUX('B', 3, AF13)>; /* USART7_RX */
  291. bias-disable;
  292. };
  293. };
  294. uart7_idle_pins_mx: uart7-idle-0 {
  295. pins1 {
  296. pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* USART7_TX */
  297. };
  298. pins2 {
  299. pinmux = <STM32_PINMUX('B', 3, AF13)>; /* USART7_RX */
  300. bias-disable;
  301. };
  302. };
  303. uart7_sleep_pins_mx: uart7-sleep-0 {
  304. pins {
  305. pinmux = <STM32_PINMUX('A', 15, ANALOG)>, /* USART7_TX */
  306. <STM32_PINMUX('B', 3, ANALOG)>; /* USART7_RX */
  307. };
  308. };
  309. uart8_pins_mx: uart8-0 {
  310. pins1 {
  311. pinmux = <STM32_PINMUX('E', 1, AF8)>; /* USART8_TX */
  312. bias-disable;
  313. drive-push-pull;
  314. slew-rate = <0>;
  315. };
  316. pins2 {
  317. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* USART8_RX */
  318. bias-disable;
  319. };
  320. };
  321. uart8_idle_pins_mx: uart8-idle-0 {
  322. pins1 {
  323. pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* USART8_TX */
  324. };
  325. pins2 {
  326. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* USART8_RX */
  327. bias-disable;
  328. };
  329. };
  330. uart8_sleep_pins_mx: uart8-sleep-0 {
  331. pins {
  332. pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* USART8_TX */
  333. <STM32_PINMUX('E', 0, ANALOG)>; /* USART8_RX */
  334. };
  335. };
  336. m_can1_pins_mx: m-can1-0 {
  337. pins1 {
  338. pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
  339. slew-rate = <0>;
  340. drive-push-pull;
  341. bias-disable;
  342. };
  343. pins2 {
  344. pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
  345. bias-disable;
  346. };
  347. };
  348. m_can1_sleep_pins_mx: m_can1-sleep@0 {
  349. pins {
  350. pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
  351. <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
  352. };
  353. };
  354. pwm1_pins_mx: pwm1-0 {
  355. pins {
  356. pinmux = <STM32_PINMUX('A', 9, AF1)>; /* TIM1_CH2 */
  357. bias-pull-down;
  358. drive-push-pull;
  359. slew-rate = <0>;
  360. };
  361. };
  362. pwm1_sleep_pins_mx: pwm1-sleep-0 {
  363. pins {
  364. pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* TIM1_CH1 */
  365. };
  366. };
  367. pwm3_pins_mx: pwm3-0 {
  368. pins {
  369. pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
  370. bias-pull-down;
  371. drive-push-pull;
  372. slew-rate = <0>;
  373. };
  374. };
  375. pwm3_sleep_pins_mx: pwm3-sleep-0 {
  376. pins {
  377. pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
  378. };
  379. };
  380. pwm4_pins_mx: pwm4-0 {
  381. pins {
  382. pinmux = <STM32_PINMUX('B', 7, AF2)>; /* TIM4_CH2 */
  383. bias-pull-down;
  384. drive-push-pull;
  385. slew-rate = <0>;
  386. };
  387. };
  388. pwm4_sleep_pins_mx: pwm4-sleep-0 {
  389. pins {
  390. pinmux = <STM32_PINMUX('B', 7, ANALOG)>; /* TIM4_CH2 */
  391. };
  392. };
  393. pwm8_pins_mx: pwm8-0 {
  394. pins {
  395. pinmux = <STM32_PINMUX('I', 6, AF3)>; /* TIM8_CH2 */
  396. bias-pull-down;
  397. drive-push-pull;
  398. slew-rate = <0>;
  399. };
  400. };
  401. pwm8_sleep_pins_mx: pwm8-sleep-0 {
  402. pins {
  403. pinmux = <STM32_PINMUX('I', 6, ANALOG)>; /* TIM8_CH2 */
  404. };
  405. };
  406. pwm12_pins_mx: pwm12-0 {
  407. pins {
  408. pinmux = <STM32_PINMUX('H', 9, AF2)>; /* TIM12_CH2 */
  409. bias-pull-down;
  410. drive-push-pull;
  411. slew-rate = <0>;
  412. };
  413. };
  414. pwm12_sleep_pins_mx: pwm12-sleep-0 {
  415. pins {
  416. pinmux = <STM32_PINMUX('H', 9, ANALOG)>; /* TIM12_CH2 */
  417. };
  418. };
  419. sdmmc1_pins_mx: sdmmc1_mx-0 {
  420. u-boot,dm-pre-reloc;
  421. pins1 {
  422. u-boot,dm-pre-reloc;
  423. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  424. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  425. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  426. <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  427. <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  428. bias-disable;
  429. drive-push-pull;
  430. slew-rate = <1>;
  431. };
  432. pins2 {
  433. u-boot,dm-pre-reloc;
  434. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  435. bias-disable;
  436. drive-push-pull;
  437. slew-rate = <2>;
  438. };
  439. };
  440. sdmmc1_opendrain_pins_mx: sdmmc1_opendrain_mx-0 {
  441. u-boot,dm-pre-reloc;
  442. pins1 {
  443. u-boot,dm-pre-reloc;
  444. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  445. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  446. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  447. <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
  448. bias-disable;
  449. drive-push-pull;
  450. slew-rate = <1>;
  451. };
  452. pins2 {
  453. u-boot,dm-pre-reloc;
  454. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  455. bias-disable;
  456. drive-push-pull;
  457. slew-rate = <2>;
  458. };
  459. pins3 {
  460. u-boot,dm-pre-reloc;
  461. pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  462. bias-disable;
  463. drive-open-drain;
  464. slew-rate = <1>;
  465. };
  466. };
  467. sdmmc1_sleep_pins_mx: sdmmc1_sleep_mx-0 {
  468. u-boot,dm-pre-reloc;
  469. pins {
  470. u-boot,dm-pre-reloc;
  471. pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
  472. <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
  473. <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
  474. <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
  475. <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
  476. <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
  477. };
  478. };
  479. uart4_pins_mx: uart4_mx-0 {
  480. u-boot,dm-pre-reloc;
  481. pins1 {
  482. u-boot,dm-pre-reloc;
  483. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  484. /* pull-up on rx to avoid floating level */
  485. bias-pull-up;
  486. };
  487. pins2 {
  488. u-boot,dm-pre-reloc;
  489. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  490. bias-disable;
  491. drive-push-pull;
  492. slew-rate = <0>;
  493. };
  494. };
  495. uart4_sleep_pins_mx: uart4_sleep_mx-0 {
  496. u-boot,dm-pre-reloc;
  497. pins {
  498. u-boot,dm-pre-reloc;
  499. pinmux = <STM32_PINMUX('B', 2, ANALOG)>, /* UART4_RX */
  500. <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
  501. };
  502. };
  503. };
  504. &pinctrl_z {
  505. u-boot,dm-pre-reloc;
  506. i2c4_pins_z_mx: i2c4_mx-0 {
  507. u-boot,dm-pre-reloc;
  508. pins {
  509. u-boot,dm-pre-reloc;
  510. pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
  511. <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
  512. bias-disable;
  513. drive-open-drain;
  514. slew-rate = <0>;
  515. };
  516. };
  517. i2c4_sleep_pins_z_mx: i2c4_sleep_mx-0 {
  518. u-boot,dm-pre-reloc;
  519. pins {
  520. u-boot,dm-pre-reloc;
  521. pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
  522. <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
  523. };
  524. };
  525. spi6_pins_mx: spi6-0 {
  526. pins1 {
  527. pinmux = <STM32_PINMUX('Z', 0, AF8)>, /* SPI6_SCK */
  528. <STM32_PINMUX('Z', 2, AF8)>; /* SPI6_MOSI */
  529. bias-disable;
  530. drive-push-pull;
  531. slew-rate = <1>;
  532. };
  533. pins2 {
  534. pinmux = <STM32_PINMUX('Z', 1, AF8)>; /* SPI6_MISO */
  535. bias-disable;
  536. };
  537. };
  538. spi6_sleep_pins_mx: spi6-sleep-0 {
  539. pins {
  540. pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI6_SCK */
  541. <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI6_MISO */
  542. <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI6_MOSI */
  543. };
  544. };
  545. };
  546. &m4_rproc{
  547. /*Restriction: "memory-region" property is not managed - please to use User-Section if needed*/
  548. mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
  549. mbox-names = "vq0", "vq1", "shutdown";
  550. status = "okay";
  551. memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
  552. <&vdev0vring1>, <&vdev0buffer>;
  553. interrupt-parent = <&exti>;
  554. interrupts = <68 1>;
  555. wakeup-source;
  556. };
  557. &pwr_regulators {
  558. vdd-supply = <&vdd>;
  559. vdd_3v3_usbfs-supply = <&vdd_usb>;
  560. };
  561. &bsec{
  562. status = "okay";
  563. };
  564. &crc1{
  565. status = "okay";
  566. };
  567. &cryp1{
  568. u-boot,dm-pre-reloc;
  569. status = "okay";
  570. };
  571. &dma1{
  572. status = "okay";
  573. sram = <&dma_pool>;
  574. };
  575. &dma2{
  576. status = "okay";
  577. sram = <&dma_pool>;
  578. };
  579. &dmamux1{
  580. dma-masters = <&dma1 &dma2>;
  581. dma-channels = <16>;
  582. status = "okay";
  583. };
  584. &dts{
  585. status = "okay";
  586. };
  587. &gpu{
  588. status = "okay";
  589. contiguous-area = <&gpu_reserved>;
  590. };
  591. &hash1{
  592. u-boot,dm-pre-reloc;
  593. status = "okay";
  594. };
  595. &hsem{
  596. status = "okay";
  597. };
  598. &i2c1 {
  599. pinctrl-names = "default", "sleep";
  600. pinctrl-0 = <&i2c1_pins_mx>;
  601. pinctrl-1 = <&i2c1_pins_sleep_mx>;
  602. i2c-scl-rising-time-ns = <100>;
  603. i2c-scl-falling-time-ns = <7>;
  604. status = "okay";
  605. /delete-property/dmas;
  606. /delete-property/dma-names;
  607. };
  608. &i2c2 {
  609. pinctrl-names = "default", "sleep";
  610. pinctrl-0 = <&i2c2_pins_mx>;
  611. pinctrl-1 = <&i2c2_pins_sleep_mx>;
  612. i2c-scl-rising-time-ns = <100>;
  613. i2c-scl-falling-time-ns = <7>;
  614. status = "okay";
  615. /delete-property/dmas;
  616. /delete-property/dma-names;
  617. };
  618. &i2c5 {
  619. pinctrl-names = "default", "sleep";
  620. pinctrl-0 = <&i2c5_pins_mx>;
  621. pinctrl-1 = <&i2c5_pins_sleep_mx>;
  622. i2c-scl-rising-time-ns = <100>;
  623. i2c-scl-falling-time-ns = <7>;
  624. status = "okay";
  625. /delete-property/dmas;
  626. /delete-property/dma-names;
  627. };
  628. &i2c4{
  629. u-boot,dm-pre-reloc;
  630. pinctrl-names = "default", "sleep";
  631. pinctrl-0 = <&i2c4_pins_z_mx>;
  632. pinctrl-1 = <&i2c4_sleep_pins_z_mx>;
  633. status = "okay";
  634. i2c-scl-rising-time-ns = <185>;
  635. i2c-scl-falling-time-ns = <20>;
  636. clock-frequency = <400000>;
  637. /delete-property/ dmas;
  638. /delete-property/ dma-names;
  639. pmic:stpmic@33{
  640. compatible = "st,stpmic1";
  641. reg = <0x33>;
  642. interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
  643. interrupt-controller;
  644. #interrupt-cells = <2>;
  645. status = "okay";
  646. regulators{
  647. compatible = "st,stpmic1-regulators";
  648. buck1-supply = <&vin>;
  649. buck2-supply = <&vin>;
  650. buck3-supply = <&vin>;
  651. buck4-supply = <&vin>;
  652. ldo1-supply = <&v3v3>;
  653. ldo2-supply = <&vin>;
  654. ldo3-supply = <&vdd_ddr>;
  655. ldo4-supply = <&vin>;
  656. ldo5-supply = <&vin>;
  657. ldo6-supply = <&v3v3>;
  658. vref_ddr-supply = <&vin>;
  659. boost-supply = <&vin>;
  660. pwr_sw1-supply = <&bst_out>;
  661. pwr_sw2-supply = <&bst_out>;
  662. vddcore:buck1{
  663. regulator-name = "vddcore";
  664. regulator-min-microvolt = <1200000>;
  665. regulator-max-microvolt = <1350000>;
  666. regulator-always-on;
  667. regulator-initial-mode = <0>;
  668. regulator-over-current-protection;
  669. };
  670. vdd_ddr:buck2{
  671. regulator-name = "vdd_ddr";
  672. regulator-min-microvolt = <1350000>;
  673. regulator-max-microvolt = <1350000>;
  674. regulator-always-on;
  675. regulator-initial-mode = <0>;
  676. regulator-over-current-protection;
  677. };
  678. vdd:buck3{
  679. regulator-name = "vdd";
  680. regulator-min-microvolt = <3300000>;
  681. regulator-max-microvolt = <3300000>;
  682. regulator-always-on;
  683. st,mask-reset;
  684. regulator-initial-mode = <0>;
  685. regulator-over-current-protection;
  686. };
  687. v3v3:buck4{
  688. regulator-name = "v3v3";
  689. regulator-min-microvolt = <3300000>;
  690. regulator-max-microvolt = <3300000>;
  691. regulator-always-on;
  692. regulator-over-current-protection;
  693. regulator-initial-mode = <0>;
  694. };
  695. v1v8_audio:ldo1{
  696. regulator-name = "v1v8_audio";
  697. regulator-min-microvolt = <1800000>;
  698. regulator-max-microvolt = <1800000>;
  699. regulator-always-on;
  700. interrupts = <IT_CURLIM_LDO1 0>;
  701. };
  702. v3v3_hdmi:ldo2{
  703. regulator-name = "v3v3_hdmi";
  704. regulator-min-microvolt = <3300000>;
  705. regulator-max-microvolt = <3300000>;
  706. regulator-always-on;
  707. interrupts = <IT_CURLIM_LDO2 0>;
  708. };
  709. vtt_ddr:ldo3{
  710. regulator-name = "vtt_ddr";
  711. regulator-min-microvolt = <500000>;
  712. regulator-max-microvolt = <750000>;
  713. regulator-always-on;
  714. regulator-over-current-protection;
  715. };
  716. vdd_usb:ldo4{
  717. regulator-name = "vdd_usb";
  718. regulator-min-microvolt = <3300000>;
  719. regulator-max-microvolt = <3300000>;
  720. interrupts = <IT_CURLIM_LDO4 0>;
  721. regulator-always-on;
  722. };
  723. vdda:ldo5{
  724. regulator-name = "vdda";
  725. regulator-min-microvolt = <2900000>;
  726. regulator-max-microvolt = <2900000>;
  727. interrupts = <IT_CURLIM_LDO5 0>;
  728. regulator-boot-on;
  729. };
  730. v1v2_hdmi:ldo6{
  731. regulator-name = "v1v2_hdmi";
  732. regulator-min-microvolt = <1200000>;
  733. regulator-max-microvolt = <1200000>;
  734. regulator-always-on;
  735. interrupts = <IT_CURLIM_LDO6 0>;
  736. };
  737. vref_ddr:vref_ddr{
  738. regulator-name = "vref_ddr";
  739. regulator-always-on;
  740. regulator-over-current-protection;
  741. };
  742. bst_out:boost{
  743. regulator-name = "bst_out";
  744. interrupts = <IT_OCP_BOOST 0>;
  745. };
  746. vbus_otg:pwr_sw1{
  747. regulator-name = "vbus_otg";
  748. interrupts = <IT_OCP_OTG 0>;
  749. };
  750. vbus_sw:pwr_sw2{
  751. regulator-name = "vbus_sw";
  752. interrupts = <IT_OCP_SWOUT 0>;
  753. regulator-active-discharge = <1>;
  754. };
  755. };
  756. onkey{
  757. compatible = "st,stpmic1-onkey";
  758. interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
  759. interrupt-names = "onkey-falling", "onkey-rising";
  760. power-off-time-sec = <10>;
  761. status = "okay";
  762. };
  763. watchdog {
  764. compatible = "st,stpmic1-wdt";
  765. status = "disabled";
  766. };
  767. };
  768. eeprom@50 {
  769. compatible = "atmel,24c02";
  770. reg = <0x50>;
  771. pagesize = <16>;
  772. };
  773. };
  774. &ipcc{
  775. status = "okay";
  776. };
  777. &iwdg2{
  778. status = "okay";
  779. timeout-sec = <32>;
  780. };
  781. &mdma1{
  782. status = "okay";
  783. };
  784. &rcc{
  785. u-boot,dm-pre-reloc;
  786. status = "okay";
  787. };
  788. &rng1{
  789. status = "okay";
  790. };
  791. &rtc{
  792. status = "okay";
  793. };
  794. &sdmmc1{
  795. u-boot,dm-pre-reloc;
  796. pinctrl-names = "default", "opendrain", "sleep";
  797. pinctrl-0 = <&sdmmc1_pins_mx>;
  798. pinctrl-1 = <&sdmmc1_opendrain_pins_mx>;
  799. pinctrl-2 = <&sdmmc1_sleep_pins_mx>;
  800. status = "okay";
  801. cd-gpios = <&gpiog 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  802. disable-wp;
  803. st,neg-edge;
  804. bus-width = <4>;
  805. vmmc-supply = <&v3v3>;
  806. };
  807. &tamp{
  808. status = "okay";
  809. };
  810. &uart4{
  811. u-boot,dm-pre-reloc;
  812. pinctrl-names = "default", "sleep";
  813. pinctrl-0 = <&uart4_pins_mx>;
  814. pinctrl-1 = <&uart4_sleep_pins_mx>;
  815. status = "okay";
  816. /delete-property/ dmas;
  817. /delete-property/ dma-names;
  818. };
  819. &usbh_ehci{
  820. status = "okay";
  821. phys = <&usbphyc_port0>;
  822. };
  823. &usbh_ohci{
  824. status = "okay";
  825. };
  826. &usbotg_hs{
  827. u-boot,dm-pre-reloc;
  828. status = "okay";
  829. phys = <&usbphyc_port1 0>;
  830. phy-names = "usb2-phy";
  831. };
  832. &usbphyc{
  833. u-boot,dm-pre-reloc;
  834. status = "okay";
  835. };
  836. &usbphyc_port0{
  837. u-boot,dm-pre-reloc;
  838. status = "okay";
  839. phy-supply = <&vdd_usb>;
  840. st,phy-tuning = <&usb_phy_tuning>;
  841. };
  842. &usbphyc_port1{
  843. u-boot,dm-pre-reloc;
  844. status = "okay";
  845. phy-supply = <&vdd_usb>;
  846. st,phy-tuning = <&usb_phy_tuning>;
  847. };
  848. &adc {
  849. vdd-supply = <&vdd>;
  850. vdda-supply = <&vdda>;
  851. vref-supply = <&vdda>;
  852. status = "okay";
  853. adc1: adc@0 {
  854. st,min-sample-time-nsecs = <5000>;
  855. st,adc-channels = <0 1>;
  856. status = "okay";
  857. };
  858. adc2: adc@100 {
  859. status = "okay";
  860. };
  861. adc_temp: temp {
  862. status = "okay";
  863. };
  864. };
  865. &usbh_ohci{
  866. phys = <&usbphyc_port0>;
  867. };
  868. &cpu0{
  869. cpu-supply = <&vddcore>;
  870. };
  871. &cpu1{
  872. cpu-supply = <&vddcore>;
  873. };
  874. &sram{
  875. dma_pool:dma_pool@0{
  876. reg = <0x50000 0x10000>;
  877. pool;
  878. };
  879. };
  880. &optee{
  881. status = "okay";
  882. };
  883. &spi2 {
  884. pinctrl-names = "default", "sleep";
  885. pinctrl-0 = <&spi2_pins_mx>;
  886. pinctrl-1 = <&spi2_sleep_pins_mx>;
  887. cs-gpios = <&gpioi 0 0>;
  888. status = "okay";
  889. spidev2: spidev2@0{
  890. compatible = "rohm,dh2228fv";
  891. spi-max-frequency = <30000000>;
  892. reg = <0>;
  893. };
  894. };
  895. &spi4 {
  896. pinctrl-names = "default", "sleep";
  897. pinctrl-0 = <&spi4_pins_mx>;
  898. pinctrl-1 = <&spi4_sleep_pins_mx>;
  899. cs-gpios = <&gpioe 11 0>;
  900. status = "okay";
  901. spidev4: spidev4@0{
  902. compatible = "rohm,dh2228fv";
  903. spi-max-frequency = <30000000>;
  904. reg = <0>;
  905. };
  906. };
  907. &spi6 {
  908. pinctrl-names = "default", "sleep";
  909. pinctrl-0 = <&spi6_pins_mx>;
  910. pinctrl-1 = <&spi6_sleep_pins_mx>;
  911. cs-gpios = <&gpioz 3 0>;
  912. status = "okay";
  913. spidev6: spidev6@0{
  914. compatible = "rohm,dh2228fv";
  915. spi-max-frequency = <30000000>;
  916. reg = <0>;
  917. };
  918. };
  919. &usart2 {
  920. pinctrl-names = "default", "sleep", "idle";
  921. pinctrl-0 = <&usart2_pins_mx>;
  922. pinctrl-1 = <&usart2_sleep_pins_mx>;
  923. pinctrl-2 = <&usart2_idle_pins_mx>;
  924. status = "okay";
  925. };
  926. &uart5 {
  927. pinctrl-names = "default", "sleep", "idle";
  928. pinctrl-0 = <&uart5_pins_mx>;
  929. pinctrl-1 = <&uart5_sleep_pins_mx>;
  930. pinctrl-2 = <&uart5_idle_pins_mx>;
  931. status = "okay";
  932. };
  933. &uart7 {
  934. pinctrl-names = "default", "sleep", "idle";
  935. pinctrl-0 = <&uart7_pins_mx>;
  936. pinctrl-1 = <&uart7_sleep_pins_mx>;
  937. pinctrl-2 = <&uart7_idle_pins_mx>;
  938. status = "okay";
  939. };
  940. &uart8 {
  941. pinctrl-names = "default", "sleep", "idle";
  942. pinctrl-0 = <&uart8_pins_mx>;
  943. pinctrl-1 = <&uart8_sleep_pins_mx>;
  944. pinctrl-2 = <&uart8_idle_pins_mx>;
  945. status = "okay";
  946. };
  947. &m_can1 {
  948. pinctrl-names = "default";
  949. pinctrl-0 = <&m_can1_pins_mx>;
  950. status = "okay";
  951. can-transceiver {
  952. max-bitrate = <5000000>;
  953. };
  954. };
  955. &timers1 {
  956. status = "okay";
  957. /* spare dmas for other usage */
  958. /delete-property/dmas;
  959. /delete-property/dma-names;
  960. pwm1: pwm {
  961. pinctrl-names = "default", "sleep";
  962. pinctrl-0 = <&pwm1_pins_mx>;
  963. pinctrl-1 = <&pwm1_sleep_pins_mx>;
  964. status = "okay";
  965. };
  966. };
  967. &timers3 {
  968. status = "okay";
  969. /* spare dmas for other usage */
  970. /delete-property/dmas;
  971. /delete-property/dma-names;
  972. pwm3: pwm {
  973. pinctrl-names = "default", "sleep";
  974. pinctrl-0 = <&pwm3_pins_mx>;
  975. pinctrl-1 = <&pwm3_sleep_pins_mx>;
  976. status = "okay";
  977. };
  978. };
  979. &timers4 {
  980. status = "okay";
  981. /* spare dmas for other usage */
  982. /delete-property/dmas;
  983. /delete-property/dma-names;
  984. pwm4: pwm {
  985. pinctrl-names = "default", "sleep";
  986. pinctrl-0 = <&pwm4_pins_mx>;
  987. pinctrl-1 = <&pwm4_sleep_pins_mx>;
  988. status = "okay";
  989. };
  990. };
  991. &timers8 {
  992. status = "okay";
  993. /* spare dmas for other usage */
  994. /delete-property/dmas;
  995. /delete-property/dma-names;
  996. pwm8: pwm {
  997. pinctrl-names = "default", "sleep";
  998. pinctrl-0 = <&pwm8_pins_mx>;
  999. pinctrl-1 = <&pwm8_sleep_pins_mx>;
  1000. status = "okay";
  1001. };
  1002. };
  1003. &timers12 {
  1004. status = "okay";
  1005. /* spare dmas for other usage */
  1006. /delete-property/dmas;
  1007. /delete-property/dma-names;
  1008. pwm12: pwm {
  1009. pinctrl-names = "default", "sleep";
  1010. pinctrl-0 = <&pwm12_pins_mx>;
  1011. pinctrl-1 = <&pwm12_sleep_pins_mx>;
  1012. status = "okay";
  1013. };
  1014. };