Config.in 11 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_USE_MMU
  9. bool
  10. config BR2_ARCH_HAS_FDPIC_SUPPORT
  11. bool
  12. choice
  13. prompt "Target Architecture"
  14. default BR2_i386
  15. help
  16. Select the target architecture family to build for.
  17. config BR2_arcle
  18. bool "ARC (little endian)"
  19. select BR2_USE_MMU
  20. help
  21. Synopsys' DesignWare ARC Processor Cores are a family of
  22. 32-bit CPUs that can be used from deeply embedded to high
  23. performance host applications. Little endian.
  24. config BR2_arceb
  25. bool "ARC (big endian)"
  26. select BR2_USE_MMU
  27. help
  28. Synopsys' DesignWare ARC Processor Cores are a family of
  29. 32-bit CPUs that can be used from deeply embedded to high
  30. performance host applications. Big endian.
  31. config BR2_arm
  32. bool "ARM (little endian)"
  33. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  34. help
  35. ARM is a 32-bit reduced instruction set computer (RISC)
  36. instruction set architecture (ISA) developed by ARM Holdings.
  37. Little endian.
  38. http://www.arm.com/
  39. http://en.wikipedia.org/wiki/ARM
  40. config BR2_armeb
  41. bool "ARM (big endian)"
  42. select BR2_USE_MMU
  43. help
  44. ARM is a 32-bit reduced instruction set computer (RISC)
  45. instruction set architecture (ISA) developed by ARM Holdings.
  46. Big endian.
  47. http://www.arm.com/
  48. http://en.wikipedia.org/wiki/ARM
  49. config BR2_aarch64
  50. bool "AArch64 (little endian)"
  51. select BR2_ARCH_IS_64
  52. help
  53. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  54. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  55. http://en.wikipedia.org/wiki/ARM
  56. config BR2_aarch64_be
  57. bool "AArch64 (big endian)"
  58. select BR2_ARCH_IS_64
  59. help
  60. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  61. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  62. http://en.wikipedia.org/wiki/ARM
  63. config BR2_i386
  64. bool "i386"
  65. select BR2_USE_MMU
  66. help
  67. Intel i386 architecture compatible microprocessor
  68. http://en.wikipedia.org/wiki/I386
  69. config BR2_m68k
  70. bool "m68k"
  71. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  72. help
  73. Motorola 68000 family microprocessor
  74. http://en.wikipedia.org/wiki/M68k
  75. config BR2_microblazeel
  76. bool "Microblaze AXI (little endian)"
  77. select BR2_USE_MMU
  78. help
  79. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
  80. bus based architecture (little endian)
  81. http://www.xilinx.com
  82. http://en.wikipedia.org/wiki/Microblaze
  83. config BR2_microblazebe
  84. bool "Microblaze non-AXI (big endian)"
  85. select BR2_USE_MMU
  86. help
  87. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
  88. bus based architecture (non-AXI, big endian)
  89. http://www.xilinx.com
  90. http://en.wikipedia.org/wiki/Microblaze
  91. config BR2_mips
  92. bool "MIPS (big endian)"
  93. select BR2_USE_MMU
  94. help
  95. MIPS is a RISC microprocessor from MIPS Technologies. Big
  96. endian.
  97. http://www.mips.com/
  98. http://en.wikipedia.org/wiki/MIPS_Technologies
  99. config BR2_mipsel
  100. bool "MIPS (little endian)"
  101. select BR2_USE_MMU
  102. help
  103. MIPS is a RISC microprocessor from MIPS Technologies. Little
  104. endian.
  105. http://www.mips.com/
  106. http://en.wikipedia.org/wiki/MIPS_Technologies
  107. config BR2_mips64
  108. bool "MIPS64 (big endian)"
  109. select BR2_ARCH_IS_64
  110. select BR2_USE_MMU
  111. help
  112. MIPS is a RISC microprocessor from MIPS Technologies. Big
  113. endian.
  114. http://www.mips.com/
  115. http://en.wikipedia.org/wiki/MIPS_Technologies
  116. config BR2_mips64el
  117. bool "MIPS64 (little endian)"
  118. select BR2_ARCH_IS_64
  119. select BR2_USE_MMU
  120. help
  121. MIPS is a RISC microprocessor from MIPS Technologies. Little
  122. endian.
  123. http://www.mips.com/
  124. http://en.wikipedia.org/wiki/MIPS_Technologies
  125. config BR2_or1k
  126. bool "OpenRISC"
  127. select BR2_USE_MMU
  128. help
  129. OpenRISC is a free and open processor for embedded system.
  130. http://openrisc.io
  131. config BR2_powerpc
  132. bool "PowerPC"
  133. select BR2_USE_MMU
  134. help
  135. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  136. alliance. Big endian.
  137. http://www.power.org/
  138. http://en.wikipedia.org/wiki/Powerpc
  139. config BR2_powerpc64
  140. bool "PowerPC64 (big endian)"
  141. select BR2_ARCH_IS_64
  142. select BR2_USE_MMU
  143. help
  144. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  145. alliance. Big endian.
  146. http://www.power.org/
  147. http://en.wikipedia.org/wiki/Powerpc
  148. config BR2_powerpc64le
  149. bool "PowerPC64 (little endian)"
  150. select BR2_ARCH_IS_64
  151. select BR2_USE_MMU
  152. help
  153. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  154. alliance. Little endian.
  155. http://www.power.org/
  156. http://en.wikipedia.org/wiki/Powerpc
  157. config BR2_riscv
  158. bool "RISCV"
  159. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  160. help
  161. RISC-V is an open, free Instruction Set Architecture created
  162. by the UC Berkeley Architecture Research group and supported
  163. and promoted by RISC-V Foundation.
  164. https://riscv.org/
  165. https://en.wikipedia.org/wiki/RISC-V
  166. config BR2_s390x
  167. bool "s390x"
  168. select BR2_ARCH_IS_64
  169. select BR2_USE_MMU
  170. help
  171. s390x is a big-endian architecture made by IBM.
  172. http://www.ibm.com/
  173. http://en.wikipedia.org/wiki/IBM_System/390
  174. config BR2_sh
  175. bool "SuperH"
  176. select BR2_USE_MMU
  177. help
  178. SuperH (or SH) is a 32-bit reduced instruction set computer
  179. (RISC) instruction set architecture (ISA) developed by
  180. Hitachi.
  181. http://www.hitachi.com/
  182. http://en.wikipedia.org/wiki/SuperH
  183. config BR2_sparc
  184. bool "SPARC"
  185. select BR2_USE_MMU
  186. help
  187. SPARC (from Scalable Processor Architecture) is a RISC
  188. instruction set architecture (ISA) developed by Sun
  189. Microsystems.
  190. http://www.oracle.com/sun
  191. http://en.wikipedia.org/wiki/Sparc
  192. config BR2_sparc64
  193. bool "SPARC64"
  194. select BR2_ARCH_IS_64
  195. select BR2_USE_MMU
  196. help
  197. SPARC (from Scalable Processor Architecture) is a RISC
  198. instruction set architecture (ISA) developed by Sun
  199. Microsystems.
  200. http://www.oracle.com/sun
  201. http://en.wikipedia.org/wiki/Sparc
  202. config BR2_x86_64
  203. bool "x86_64"
  204. select BR2_ARCH_IS_64
  205. select BR2_USE_MMU
  206. help
  207. x86-64 is an extension of the x86 instruction set (Intel i386
  208. architecture compatible microprocessor).
  209. http://en.wikipedia.org/wiki/X86_64
  210. config BR2_xtensa
  211. bool "Xtensa"
  212. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  213. help
  214. Xtensa is a Tensilica processor IP architecture.
  215. http://en.wikipedia.org/wiki/Xtensa
  216. http://www.tensilica.com/
  217. endchoice
  218. # For some architectures or specific cores, our internal toolchain
  219. # backend is not suitable (like, missing support in upstream gcc, or
  220. # no ChipCo fork exists...)
  221. config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  222. bool
  223. config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
  224. bool
  225. default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  226. # The following symbols are selected by the individual
  227. # Config.in.$ARCH files
  228. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  229. bool
  230. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  231. bool
  232. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  233. config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  234. bool
  235. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  236. config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  237. bool
  238. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  239. config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  240. bool
  241. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  242. config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  243. bool
  244. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  245. config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  246. bool
  247. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  248. config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  249. bool
  250. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  251. config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  252. bool
  253. select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  254. config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
  255. bool
  256. select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  257. config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
  258. bool
  259. select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
  260. config BR2_ARCH_NEEDS_GCC_AT_LEAST_14
  261. bool
  262. select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
  263. config BR2_ARCH_NEEDS_GCC_AT_LEAST_15
  264. bool
  265. select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
  266. # The following string values are defined by the individual
  267. # Config.in.$ARCH files
  268. config BR2_ARCH
  269. string
  270. config BR2_NORMALIZED_ARCH
  271. string
  272. config BR2_ENDIAN
  273. string
  274. config BR2_GCC_TARGET_ARCH
  275. string
  276. config BR2_GCC_TARGET_ABI
  277. string
  278. config BR2_GCC_TARGET_NAN
  279. string
  280. config BR2_GCC_TARGET_FP32_MODE
  281. string
  282. config BR2_GCC_TARGET_CPU
  283. string
  284. # The value of this option will be passed as --with-fpu=<value> when
  285. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  286. # wrapper (external toolchain)
  287. config BR2_GCC_TARGET_FPU
  288. string
  289. # The value of this option will be passed as --with-float=<value> when
  290. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  291. # wrapper (external toolchain)
  292. config BR2_GCC_TARGET_FLOAT_ABI
  293. string
  294. # The value of this option will be passed as --with-mode=<value> when
  295. # building gcc (internal backend) or -m<value> in the toolchain
  296. # wrapper (external toolchain)
  297. config BR2_GCC_TARGET_MODE
  298. string
  299. # Must be selected by binary formats that support shared libraries.
  300. config BR2_BINFMT_SUPPORTS_SHARED
  301. bool
  302. # Must match the name of the architecture from readelf point of view,
  303. # i.e the "Machine:" field of readelf output. See get_machine_name()
  304. # in binutils/readelf.c for the list of possible values.
  305. config BR2_READELF_ARCH_NAME
  306. string
  307. if BR2_arcle || BR2_arceb
  308. source "arch/Config.in.arc"
  309. endif
  310. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  311. source "arch/Config.in.arm"
  312. endif
  313. if BR2_m68k
  314. source "arch/Config.in.m68k"
  315. endif
  316. if BR2_microblazeel || BR2_microblazebe
  317. source "arch/Config.in.microblaze"
  318. endif
  319. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  320. source "arch/Config.in.mips"
  321. endif
  322. if BR2_or1k
  323. source "arch/Config.in.or1k"
  324. endif
  325. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  326. source "arch/Config.in.powerpc"
  327. endif
  328. if BR2_riscv
  329. source "arch/Config.in.riscv"
  330. endif
  331. if BR2_s390x
  332. source "arch/Config.in.s390x"
  333. endif
  334. if BR2_sh
  335. source "arch/Config.in.sh"
  336. endif
  337. if BR2_sparc || BR2_sparc64
  338. source "arch/Config.in.sparc"
  339. endif
  340. if BR2_i386 || BR2_x86_64
  341. source "arch/Config.in.x86"
  342. endif
  343. if BR2_xtensa
  344. source "arch/Config.in.xtensa"
  345. endif
  346. # Set up target binary format
  347. choice
  348. prompt "Target Binary Format"
  349. default BR2_BINFMT_ELF if BR2_USE_MMU
  350. default BR2_BINFMT_FLAT
  351. config BR2_BINFMT_ELF
  352. bool "ELF"
  353. depends on BR2_USE_MMU
  354. select BR2_BINFMT_SUPPORTS_SHARED
  355. help
  356. ELF (Executable and Linkable Format) is a format for libraries
  357. and executables used across different architectures and
  358. operating systems.
  359. config BR2_BINFMT_FDPIC
  360. bool "FDPIC"
  361. depends on BR2_ARCH_HAS_FDPIC_SUPPORT
  362. select BR2_BINFMT_SUPPORTS_SHARED
  363. help
  364. ELF FDPIC binaries are based on ELF, but allow the individual
  365. load segments of a binary to be located in memory
  366. independently of each other. This makes this format ideal for
  367. use in environments where no MMU is available.
  368. config BR2_BINFMT_FLAT
  369. bool "FLAT"
  370. depends on !BR2_USE_MMU
  371. help
  372. FLAT binary is a relatively simple and lightweight executable
  373. format based on the original a.out format. It is widely used
  374. in environment where no MMU is available.
  375. endchoice
  376. endmenu # Target options