stm32mp157c-osd32mp1-brk.dts 22 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
  2. /*
  3. * Copyright (C) Octavo Systems LLC 2020 - All Rights Reserved
  4. */
  5. /* For more information on Device Tree configuration, please refer to
  6. * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
  7. */
  8. /dts-v1/;
  9. #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  10. #include "stm32mp157.dtsi"
  11. #include "stm32mp15xc.dtsi"
  12. #include "stm32mp15xxac-pinctrl.dtsi"
  13. #include "stm32mp15-m4-srm.dtsi"
  14. #include <dt-bindings/mfd/st,stpmic1.h>
  15. #include <dt-bindings/gpio/gpio.h>
  16. #include <dt-bindings/rtc/rtc-stm32.h>
  17. / {
  18. model = "Octavo OSD32MP1 BRK board";
  19. compatible = "st,stm32mp157c-osd32mp1-brk", "st,stm32mp157";
  20. memory@c0000000 {
  21. device_type = "memory";
  22. reg = <0xc0000000 0x20000000>;
  23. };
  24. reserved-memory {
  25. #address-cells = <1>;
  26. #size-cells = <1>;
  27. ranges;
  28. mcuram2:mcuram2@10000000{
  29. compatible = "shared-dma-pool";
  30. reg = <0x10000000 0x40000>;
  31. no-map;
  32. };
  33. vdev0vring0:vdev0vring0@10040000{
  34. compatible = "shared-dma-pool";
  35. reg = <0x10040000 0x1000>;
  36. no-map;
  37. };
  38. vdev0vring1:vdev0vring1@10041000{
  39. compatible = "shared-dma-pool";
  40. reg = <0x10041000 0x1000>;
  41. no-map;
  42. };
  43. vdev0buffer:vdev0buffer@10042000{
  44. compatible = "shared-dma-pool";
  45. reg = <0x10042000 0x4000>;
  46. no-map;
  47. };
  48. mcuram:mcuram@30000000{
  49. compatible = "shared-dma-pool";
  50. reg = <0x30000000 0x40000>;
  51. no-map;
  52. };
  53. retram:retram@38000000{
  54. compatible = "shared-dma-pool";
  55. reg = <0x38000000 0x10000>;
  56. no-map;
  57. };
  58. gpu_reserved:gpu@d4000000{
  59. reg = <0xd4000000 0x4000000>;
  60. no-map;
  61. };
  62. };
  63. led{
  64. compatible = "gpio-leds";
  65. red1{
  66. label = "LED1_RED";
  67. gpios = <&gpioz 6 GPIO_ACTIVE_LOW>;
  68. linux,default-trigger = "heartbeat";
  69. status = "okay";
  70. default-state = "off";
  71. };
  72. green1{
  73. label = "LED1_GRN";
  74. gpios = <&gpioz 7 GPIO_ACTIVE_LOW>;
  75. status = "okay";
  76. default-state = "on";
  77. };
  78. red2{
  79. label = "LED2_RED";
  80. gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
  81. status = "okay";
  82. default-state = "off";
  83. };
  84. green2{
  85. label = "LED2_GRN";
  86. gpios = <&gpioi 9 GPIO_ACTIVE_LOW>;
  87. default-state = "off";
  88. };
  89. };
  90. usb_phy_tuning:usb-phy-tuning{
  91. st,hs-dc-level = <2>;
  92. st,fs-rftime-tuning;
  93. st,hs-rftime-reduction;
  94. st,hs-current-trim = <15>;
  95. st,hs-impedance-trim = <1>;
  96. st,squelch-level = <3>;
  97. st,hs-rx-offset = <2>;
  98. st,no-lsfs-sc;
  99. };
  100. vin:vin{
  101. compatible = "regulator-fixed";
  102. regulator-name = "vin";
  103. regulator-min-microvolt = <5000000>;
  104. regulator-max-microvolt = <5000000>;
  105. regulator-always-on;
  106. };
  107. aliases{
  108. serial0 = &uart4;
  109. serial2 = &usart2;
  110. serial5 = &uart5;
  111. serial7 = &uart7;
  112. serial1 = &uart8;
  113. };
  114. chosen{
  115. stdout-path = "serial0:115200n8";
  116. };
  117. }; /*root*/
  118. &pinctrl {
  119. u-boot,dm-pre-reloc;
  120. i2c1_pins_mx: i2c1-0 {
  121. pins {
  122. pinmux = <STM32_PINMUX('H', 11, AF5)>, /* I2C1_SCL */
  123. <STM32_PINMUX('H', 12, AF5)>; /* I2C1_SDA */
  124. bias-disable;
  125. drive-open-drain;
  126. slew-rate = <0>;
  127. };
  128. };
  129. i2c1_pins_sleep_mx: i2c1-1 {
  130. pins {
  131. pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* I2C1_SCL */
  132. <STM32_PINMUX('H', 12, ANALOG)>; /* I2C1_SDA */
  133. };
  134. };
  135. i2c2_pins_mx: i2c2-0 {
  136. pins {
  137. pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
  138. <STM32_PINMUX('G', 15, AF4)>; /* I2C2_SDA */
  139. bias-disable;
  140. drive-open-drain;
  141. slew-rate = <0>;
  142. };
  143. };
  144. i2c2_pins_sleep_mx: i2c2-1 {
  145. pins {
  146. pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
  147. <STM32_PINMUX('G', 15, ANALOG)>; /* I2C2_SDA */
  148. };
  149. };
  150. i2c5_pins_mx: i2c5-0 {
  151. pins {
  152. pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
  153. <STM32_PINMUX('D', 0, AF4)>; /* I2C5_SDA */
  154. bias-disable;
  155. drive-open-drain;
  156. slew-rate = <0>;
  157. };
  158. };
  159. i2c5_pins_sleep_mx: i2c5-1 {
  160. pins {
  161. pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
  162. <STM32_PINMUX('D', 0, ANALOG)>; /* I2C5_SDA */
  163. };
  164. };
  165. spi2_pins_mx: spi2-0 {
  166. pins1 {
  167. pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
  168. <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
  169. bias-disable;
  170. drive-push-pull;
  171. slew-rate = <1>;
  172. };
  173. pins2 {
  174. pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
  175. bias-disable;
  176. };
  177. };
  178. spi2_sleep_pins_mx: spi2-sleep-0 {
  179. pins {
  180. pinmux = <STM32_PINMUX('I', 1, ANALOG)>, /* SPI2_SCK */
  181. <STM32_PINMUX('I', 2, ANALOG)>, /* SPI2_MISO */
  182. <STM32_PINMUX('I', 3, ANALOG)>; /* SPI2_MOSI */
  183. };
  184. };
  185. spi4_pins_mx: spi4-0 {
  186. pins1 {
  187. pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
  188. <STM32_PINMUX('E', 14, AF5)>; /* SPI4_MOSI */
  189. bias-disable;
  190. drive-push-pull;
  191. slew-rate = <1>;
  192. };
  193. pins2 {
  194. pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
  195. bias-disable;
  196. };
  197. };
  198. spi4_sleep_pins_mx: spi4-sleep-0 {
  199. pins {
  200. pinmux = <STM32_PINMUX('E', 12, ANALOG)>, /* SPI2_SCK */
  201. <STM32_PINMUX('E', 13, ANALOG)>, /* SPI2_MISO */
  202. <STM32_PINMUX('E', 14, ANALOG)>; /* SPI2_MOSI */
  203. };
  204. };
  205. usart2_pins_mx: usart2-0 {
  206. pins1 {
  207. pinmux = <STM32_PINMUX('F', 5, AF7)>; /* USART2_TX */
  208. bias-disable;
  209. drive-push-pull;
  210. slew-rate = <0>;
  211. };
  212. pins2 {
  213. pinmux = <STM32_PINMUX('F', 4, AF7)>; /* USART2_RX */
  214. bias-disable;
  215. };
  216. };
  217. usart2_idle_pins_mx: usart2-idle-0 {
  218. pins1 {
  219. pinmux = <STM32_PINMUX('F', 5, ANALOG)>; /* USART2_TX */
  220. };
  221. pins2 {
  222. pinmux = <STM32_PINMUX('F', 4, AF7)>; /* USART2_RX */
  223. bias-disable;
  224. };
  225. };
  226. usart2_sleep_pins_mx: usart2-sleep-0 {
  227. pins {
  228. pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
  229. <STM32_PINMUX('F', 4, ANALOG)>; /* USART2_RX */
  230. };
  231. };
  232. uart5_pins_mx: uart5-0 {
  233. pins1 {
  234. pinmux = <STM32_PINMUX('B', 13, AF14)>; /* USART5_TX */
  235. bias-disable;
  236. drive-push-pull;
  237. slew-rate = <0>;
  238. };
  239. pins2 {
  240. pinmux = <STM32_PINMUX('B', 12, AF14)>; /* USART5_RX */
  241. bias-disable;
  242. };
  243. };
  244. uart5_idle_pins_mx: uart5-idle-0 {
  245. pins1 {
  246. pinmux = <STM32_PINMUX('B', 13, ANALOG)>; /* USART5_TX */
  247. };
  248. pins2 {
  249. pinmux = <STM32_PINMUX('B', 12, AF14)>; /* USART5_RX */
  250. bias-disable;
  251. };
  252. };
  253. uart5_sleep_pins_mx: uart5-sleep-0 {
  254. pins {
  255. pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* USART5_TX */
  256. <STM32_PINMUX('B', 12, ANALOG)>; /* USART5_RX */
  257. };
  258. };
  259. uart7_pins_mx: uart7-0 {
  260. pins1 {
  261. pinmux = <STM32_PINMUX('A', 15, AF13)>; /* USART7_TX */
  262. bias-disable;
  263. drive-push-pull;
  264. slew-rate = <0>;
  265. };
  266. pins2 {
  267. pinmux = <STM32_PINMUX('B', 3, AF13)>; /* USART7_RX */
  268. bias-disable;
  269. };
  270. };
  271. uart7_idle_pins_mx: uart7-idle-0 {
  272. pins1 {
  273. pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* USART7_TX */
  274. };
  275. pins2 {
  276. pinmux = <STM32_PINMUX('B', 3, AF13)>; /* USART7_RX */
  277. bias-disable;
  278. };
  279. };
  280. uart7_sleep_pins_mx: uart7-sleep-0 {
  281. pins {
  282. pinmux = <STM32_PINMUX('A', 15, ANALOG)>, /* USART7_TX */
  283. <STM32_PINMUX('B', 3, ANALOG)>; /* USART7_RX */
  284. };
  285. };
  286. uart8_pins_mx: uart8-0 {
  287. pins1 {
  288. pinmux = <STM32_PINMUX('E', 1, AF8)>; /* USART8_TX */
  289. bias-disable;
  290. drive-push-pull;
  291. slew-rate = <0>;
  292. };
  293. pins2 {
  294. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* USART8_RX */
  295. bias-disable;
  296. };
  297. };
  298. uart8_idle_pins_mx: uart8-idle-0 {
  299. pins1 {
  300. pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* USART8_TX */
  301. };
  302. pins2 {
  303. pinmux = <STM32_PINMUX('E', 0, AF8)>; /* USART8_RX */
  304. bias-disable;
  305. };
  306. };
  307. uart8_sleep_pins_mx: uart8-sleep-0 {
  308. pins {
  309. pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* USART8_TX */
  310. <STM32_PINMUX('E', 0, ANALOG)>; /* USART8_RX */
  311. };
  312. };
  313. m_can1_pins_mx: m-can1-0 {
  314. pins1 {
  315. pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
  316. slew-rate = <0>;
  317. drive-push-pull;
  318. bias-disable;
  319. };
  320. pins2 {
  321. pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
  322. bias-disable;
  323. };
  324. };
  325. m_can1_sleep_pins_mx: m_can1-sleep@0 {
  326. pins {
  327. pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
  328. <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
  329. };
  330. };
  331. pwm1_pins_mx: pwm1-0 {
  332. pins {
  333. pinmux = <STM32_PINMUX('A', 9, AF1)>; /* TIM1_CH2 */
  334. bias-pull-down;
  335. drive-push-pull;
  336. slew-rate = <0>;
  337. };
  338. };
  339. pwm1_sleep_pins_mx: pwm1-sleep-0 {
  340. pins {
  341. pinmux = <STM32_PINMUX('A', 9, ANALOG)>; /* TIM1_CH1 */
  342. };
  343. };
  344. pwm3_pins_mx: pwm3-0 {
  345. pins {
  346. pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
  347. bias-pull-down;
  348. drive-push-pull;
  349. slew-rate = <0>;
  350. };
  351. };
  352. pwm3_sleep_pins_mx: pwm3-sleep-0 {
  353. pins {
  354. pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
  355. };
  356. };
  357. pwm4_pins_mx: pwm4-0 {
  358. pins {
  359. pinmux = <STM32_PINMUX('B', 7, AF2)>; /* TIM4_CH2 */
  360. bias-pull-down;
  361. drive-push-pull;
  362. slew-rate = <0>;
  363. };
  364. };
  365. pwm4_sleep_pins_mx: pwm4-sleep-0 {
  366. pins {
  367. pinmux = <STM32_PINMUX('B', 7, ANALOG)>; /* TIM4_CH2 */
  368. };
  369. };
  370. pwm8_pins_mx: pwm8-0 {
  371. pins {
  372. pinmux = <STM32_PINMUX('I', 6, AF3)>; /* TIM8_CH2 */
  373. bias-pull-down;
  374. drive-push-pull;
  375. slew-rate = <0>;
  376. };
  377. };
  378. pwm8_sleep_pins_mx: pwm8-sleep-0 {
  379. pins {
  380. pinmux = <STM32_PINMUX('I', 6, ANALOG)>; /* TIM8_CH2 */
  381. };
  382. };
  383. pwm12_pins_mx: pwm12-0 {
  384. pins {
  385. pinmux = <STM32_PINMUX('H', 9, AF2)>; /* TIM12_CH2 */
  386. bias-pull-down;
  387. drive-push-pull;
  388. slew-rate = <0>;
  389. };
  390. };
  391. pwm12_sleep_pins_mx: pwm12-sleep-0 {
  392. pins {
  393. pinmux = <STM32_PINMUX('H', 9, ANALOG)>; /* TIM12_CH2 */
  394. };
  395. };
  396. sdmmc1_pins_mx: sdmmc1_mx-0 {
  397. u-boot,dm-pre-reloc;
  398. pins1 {
  399. u-boot,dm-pre-reloc;
  400. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  401. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  402. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  403. <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  404. <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  405. bias-disable;
  406. drive-push-pull;
  407. slew-rate = <1>;
  408. };
  409. pins2 {
  410. u-boot,dm-pre-reloc;
  411. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  412. bias-disable;
  413. drive-push-pull;
  414. slew-rate = <2>;
  415. };
  416. };
  417. sdmmc1_opendrain_pins_mx: sdmmc1_opendrain_mx-0 {
  418. u-boot,dm-pre-reloc;
  419. pins1 {
  420. u-boot,dm-pre-reloc;
  421. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  422. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  423. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  424. <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
  425. bias-disable;
  426. drive-push-pull;
  427. slew-rate = <1>;
  428. };
  429. pins2 {
  430. u-boot,dm-pre-reloc;
  431. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  432. bias-disable;
  433. drive-push-pull;
  434. slew-rate = <2>;
  435. };
  436. pins3 {
  437. u-boot,dm-pre-reloc;
  438. pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  439. bias-disable;
  440. drive-open-drain;
  441. slew-rate = <1>;
  442. };
  443. };
  444. sdmmc1_sleep_pins_mx: sdmmc1_sleep_mx-0 {
  445. u-boot,dm-pre-reloc;
  446. pins {
  447. u-boot,dm-pre-reloc;
  448. pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
  449. <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
  450. <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
  451. <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
  452. <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
  453. <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
  454. };
  455. };
  456. uart4_pins_mx: uart4_mx-0 {
  457. u-boot,dm-pre-reloc;
  458. pins1 {
  459. u-boot,dm-pre-reloc;
  460. pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
  461. /* pull-up on rx to avoid floating level */
  462. bias-pull-up;
  463. };
  464. pins2 {
  465. u-boot,dm-pre-reloc;
  466. pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
  467. bias-disable;
  468. drive-push-pull;
  469. slew-rate = <0>;
  470. };
  471. };
  472. uart4_sleep_pins_mx: uart4_sleep_mx-0 {
  473. u-boot,dm-pre-reloc;
  474. pins {
  475. u-boot,dm-pre-reloc;
  476. pinmux = <STM32_PINMUX('B', 2, ANALOG)>, /* UART4_RX */
  477. <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
  478. };
  479. };
  480. };
  481. &pinctrl_z {
  482. u-boot,dm-pre-reloc;
  483. i2c4_pins_z_mx: i2c4_mx-0 {
  484. u-boot,dm-pre-reloc;
  485. pins {
  486. u-boot,dm-pre-reloc;
  487. pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
  488. <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
  489. bias-disable;
  490. drive-open-drain;
  491. slew-rate = <0>;
  492. };
  493. };
  494. i2c4_sleep_pins_z_mx: i2c4_sleep_mx-0 {
  495. u-boot,dm-pre-reloc;
  496. pins {
  497. u-boot,dm-pre-reloc;
  498. pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
  499. <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
  500. };
  501. };
  502. spi6_pins_mx: spi6-0 {
  503. pins1 {
  504. pinmux = <STM32_PINMUX('Z', 0, AF8)>, /* SPI6_SCK */
  505. <STM32_PINMUX('Z', 2, AF8)>; /* SPI6_MOSI */
  506. bias-disable;
  507. drive-push-pull;
  508. slew-rate = <1>;
  509. };
  510. pins2 {
  511. pinmux = <STM32_PINMUX('Z', 1, AF8)>; /* SPI6_MISO */
  512. bias-disable;
  513. };
  514. };
  515. spi6_sleep_pins_mx: spi6-sleep-0 {
  516. pins {
  517. pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI6_SCK */
  518. <STM32_PINMUX('Z', 1, ANALOG)>, /* SPI6_MISO */
  519. <STM32_PINMUX('Z', 2, ANALOG)>; /* SPI6_MOSI */
  520. };
  521. };
  522. };
  523. &m4_rproc{
  524. memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
  525. <&vdev0vring1>, <&vdev0buffer>;
  526. mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
  527. mbox-names = "vq0", "vq1", "shutdown";
  528. interrupt-parent = <&exti>;
  529. interrupts = <68 1>;
  530. wakeup-source;
  531. status = "okay";
  532. };
  533. &pwr_regulators {
  534. vdd-supply = <&vdd>;
  535. vdd_3v3_usbfs-supply = <&vdd_usb>;
  536. };
  537. &crc1{
  538. status = "okay";
  539. };
  540. &cryp1{
  541. u-boot,dm-pre-reloc;
  542. status = "okay";
  543. };
  544. &dma1{
  545. status = "okay";
  546. sram = <&dma_pool>;
  547. };
  548. &dma2{
  549. status = "okay";
  550. sram = <&dma_pool>;
  551. };
  552. &dts{
  553. status = "okay";
  554. };
  555. &gpu{
  556. status = "okay";
  557. contiguous-area = <&gpu_reserved>;
  558. };
  559. &hash1{
  560. u-boot,dm-pre-reloc;
  561. status = "okay";
  562. };
  563. &hsem{
  564. status = "okay";
  565. };
  566. &i2c1 {
  567. pinctrl-names = "default", "sleep";
  568. pinctrl-0 = <&i2c1_pins_mx>;
  569. pinctrl-1 = <&i2c1_pins_sleep_mx>;
  570. i2c-scl-rising-time-ns = <100>;
  571. i2c-scl-falling-time-ns = <7>;
  572. status = "okay";
  573. /delete-property/dmas;
  574. /delete-property/dma-names;
  575. };
  576. &i2c2 {
  577. pinctrl-names = "default", "sleep";
  578. pinctrl-0 = <&i2c2_pins_mx>;
  579. pinctrl-1 = <&i2c2_pins_sleep_mx>;
  580. i2c-scl-rising-time-ns = <100>;
  581. i2c-scl-falling-time-ns = <7>;
  582. status = "okay";
  583. /delete-property/dmas;
  584. /delete-property/dma-names;
  585. };
  586. &i2c5 {
  587. pinctrl-names = "default", "sleep";
  588. pinctrl-0 = <&i2c5_pins_mx>;
  589. pinctrl-1 = <&i2c5_pins_sleep_mx>;
  590. i2c-scl-rising-time-ns = <100>;
  591. i2c-scl-falling-time-ns = <7>;
  592. status = "okay";
  593. /delete-property/dmas;
  594. /delete-property/dma-names;
  595. };
  596. &i2c4{
  597. u-boot,dm-pre-reloc;
  598. pinctrl-names = "default", "sleep";
  599. pinctrl-0 = <&i2c4_pins_z_mx>;
  600. pinctrl-1 = <&i2c4_sleep_pins_z_mx>;
  601. status = "okay";
  602. i2c-scl-rising-time-ns = <185>;
  603. i2c-scl-falling-time-ns = <20>;
  604. clock-frequency = <400000>;
  605. /delete-property/ dmas;
  606. /delete-property/ dma-names;
  607. pmic:stpmic@33{
  608. compatible = "st,stpmic1";
  609. reg = <0x33>;
  610. interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
  611. interrupt-controller;
  612. #interrupt-cells = <2>;
  613. status = "okay";
  614. regulators{
  615. compatible = "st,stpmic1-regulators";
  616. buck1-supply = <&vin>;
  617. buck2-supply = <&vin>;
  618. buck3-supply = <&vin>;
  619. buck4-supply = <&vin>;
  620. ldo1-supply = <&v3v3>;
  621. ldo2-supply = <&vin>;
  622. ldo3-supply = <&vdd_ddr>;
  623. ldo4-supply = <&vin>;
  624. ldo5-supply = <&vin>;
  625. ldo6-supply = <&v3v3>;
  626. vref_ddr-supply = <&vin>;
  627. boost-supply = <&vin>;
  628. pwr_sw1-supply = <&bst_out>;
  629. pwr_sw2-supply = <&bst_out>;
  630. vddcore:buck1{
  631. regulator-name = "vddcore";
  632. regulator-min-microvolt = <1200000>;
  633. regulator-max-microvolt = <1350000>;
  634. regulator-always-on;
  635. regulator-initial-mode = <0>;
  636. regulator-over-current-protection;
  637. };
  638. vdd_ddr:buck2{
  639. regulator-name = "vdd_ddr";
  640. regulator-min-microvolt = <1350000>;
  641. regulator-max-microvolt = <1350000>;
  642. regulator-always-on;
  643. regulator-initial-mode = <0>;
  644. regulator-over-current-protection;
  645. };
  646. vdd:buck3{
  647. regulator-name = "vdd";
  648. regulator-min-microvolt = <3300000>;
  649. regulator-max-microvolt = <3300000>;
  650. regulator-always-on;
  651. st,mask-reset;
  652. regulator-initial-mode = <0>;
  653. regulator-over-current-protection;
  654. };
  655. v3v3:buck4{
  656. regulator-name = "v3v3";
  657. regulator-min-microvolt = <3300000>;
  658. regulator-max-microvolt = <3300000>;
  659. regulator-always-on;
  660. regulator-over-current-protection;
  661. regulator-initial-mode = <0>;
  662. };
  663. v1v8_audio:ldo1{
  664. regulator-name = "v1v8_audio";
  665. regulator-min-microvolt = <1800000>;
  666. regulator-max-microvolt = <1800000>;
  667. regulator-always-on;
  668. interrupts = <IT_CURLIM_LDO1 0>;
  669. };
  670. v3v3_hdmi:ldo2{
  671. regulator-name = "v3v3_hdmi";
  672. regulator-min-microvolt = <3300000>;
  673. regulator-max-microvolt = <3300000>;
  674. regulator-always-on;
  675. interrupts = <IT_CURLIM_LDO2 0>;
  676. };
  677. vtt_ddr:ldo3{
  678. regulator-name = "vtt_ddr";
  679. regulator-min-microvolt = <500000>;
  680. regulator-max-microvolt = <750000>;
  681. regulator-always-on;
  682. regulator-over-current-protection;
  683. };
  684. vdd_usb:ldo4{
  685. regulator-name = "vdd_usb";
  686. interrupts = <IT_CURLIM_LDO4 0>;
  687. };
  688. vdda:ldo5{
  689. regulator-name = "vdda";
  690. regulator-min-microvolt = <2900000>;
  691. regulator-max-microvolt = <2900000>;
  692. interrupts = <IT_CURLIM_LDO5 0>;
  693. regulator-boot-on;
  694. };
  695. v1v2_hdmi:ldo6{
  696. regulator-name = "v1v2_hdmi";
  697. regulator-min-microvolt = <1200000>;
  698. regulator-max-microvolt = <1200000>;
  699. regulator-always-on;
  700. interrupts = <IT_CURLIM_LDO6 0>;
  701. };
  702. vref_ddr:vref_ddr{
  703. regulator-name = "vref_ddr";
  704. regulator-always-on;
  705. regulator-over-current-protection;
  706. };
  707. bst_out:boost{
  708. regulator-name = "bst_out";
  709. interrupts = <IT_OCP_BOOST 0>;
  710. };
  711. vbus_otg:pwr_sw1{
  712. regulator-name = "vbus_otg";
  713. interrupts = <IT_OCP_OTG 0>;
  714. };
  715. vbus_sw:pwr_sw2{
  716. regulator-name = "vbus_sw";
  717. interrupts = <IT_OCP_SWOUT 0>;
  718. regulator-active-discharge = <1>;
  719. };
  720. };
  721. onkey{
  722. compatible = "st,stpmic1-onkey";
  723. interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
  724. interrupt-names = "onkey-falling", "onkey-rising";
  725. power-off-time-sec = <10>;
  726. status = "okay";
  727. };
  728. watchdog {
  729. compatible = "st,stpmic1-wdt";
  730. status = "disabled";
  731. };
  732. };
  733. eeprom@50 {
  734. compatible = "atmel,24c02";
  735. reg = <0x50>;
  736. pagesize = <16>;
  737. };
  738. };
  739. &ipcc{
  740. status = "okay";
  741. };
  742. &iwdg2{
  743. status = "okay";
  744. timeout-sec = <32>;
  745. };
  746. &mdma1{
  747. status = "okay";
  748. };
  749. &rcc{
  750. u-boot,dm-pre-reloc;
  751. status = "okay";
  752. };
  753. &rng1{
  754. status = "okay";
  755. };
  756. &rtc{
  757. status = "okay";
  758. };
  759. &sdmmc1{
  760. u-boot,dm-pre-reloc;
  761. pinctrl-names = "default", "opendrain", "sleep";
  762. pinctrl-0 = <&sdmmc1_pins_mx>;
  763. pinctrl-1 = <&sdmmc1_opendrain_pins_mx>;
  764. pinctrl-2 = <&sdmmc1_sleep_pins_mx>;
  765. status = "okay";
  766. cd-gpios = <&gpiog 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  767. disable-wp;
  768. st,neg-edge;
  769. bus-width = <4>;
  770. vmmc-supply = <&v3v3>;
  771. };
  772. &tamp{
  773. status = "okay";
  774. };
  775. &uart4{
  776. u-boot,dm-pre-reloc;
  777. pinctrl-names = "default", "sleep";
  778. pinctrl-0 = <&uart4_pins_mx>;
  779. pinctrl-1 = <&uart4_sleep_pins_mx>;
  780. status = "okay";
  781. /delete-property/ dmas;
  782. /delete-property/ dma-names;
  783. };
  784. &usbh_ehci{
  785. status = "okay";
  786. phys = <&usbphyc_port0>;
  787. };
  788. &usbh_ohci{
  789. status = "okay";
  790. };
  791. &usbotg_hs{
  792. u-boot,dm-pre-reloc;
  793. status = "okay";
  794. phys = <&usbphyc_port1 0>;
  795. phy-names = "usb2-phy";
  796. };
  797. &usbphyc{
  798. u-boot,dm-pre-reloc;
  799. status = "okay";
  800. };
  801. &usbphyc_port0{
  802. u-boot,dm-pre-reloc;
  803. status = "okay";
  804. phy-supply = <&vdd_usb>;
  805. st,phy-tuning = <&usb_phy_tuning>;
  806. };
  807. &usbphyc_port1{
  808. u-boot,dm-pre-reloc;
  809. status = "okay";
  810. phy-supply = <&vdd_usb>;
  811. st,phy-tuning = <&usb_phy_tuning>;
  812. };
  813. &adc {
  814. vdd-supply = <&vdd>;
  815. vdda-supply = <&vdda>;
  816. vref-supply = <&vdda>;
  817. status = "okay";
  818. adc1: adc@0 {
  819. st,min-sample-time-nsecs = <5000>;
  820. st,adc-channels = <0 1>;
  821. status = "okay";
  822. };
  823. adc2: adc@100 {
  824. status = "okay";
  825. };
  826. adc_temp: temp {
  827. status = "okay";
  828. };
  829. };
  830. &usbh_ohci{
  831. phys = <&usbphyc_port0>;
  832. };
  833. &cpu0{
  834. cpu-supply = <&vddcore>;
  835. };
  836. &cpu1{
  837. cpu-supply = <&vddcore>;
  838. };
  839. &sram{
  840. dma_pool:dma_pool@0{
  841. reg = <0x50000 0x10000>;
  842. pool;
  843. };
  844. };
  845. &spi2 {
  846. pinctrl-names = "default", "sleep";
  847. pinctrl-0 = <&spi2_pins_mx>;
  848. pinctrl-1 = <&spi2_sleep_pins_mx>;
  849. cs-gpios = <&gpioi 0 0>;
  850. status = "okay";
  851. spidev2: spidev2@0{
  852. compatible = "rohm,dh2228fv";
  853. spi-max-frequency = <30000000>;
  854. reg = <0>;
  855. };
  856. };
  857. &spi4 {
  858. pinctrl-names = "default", "sleep";
  859. pinctrl-0 = <&spi4_pins_mx>;
  860. pinctrl-1 = <&spi4_sleep_pins_mx>;
  861. cs-gpios = <&gpioe 11 0>;
  862. status = "okay";
  863. spidev4: spidev4@0{
  864. compatible = "rohm,dh2228fv";
  865. spi-max-frequency = <30000000>;
  866. reg = <0>;
  867. };
  868. };
  869. &spi6 {
  870. pinctrl-names = "default", "sleep";
  871. pinctrl-0 = <&spi6_pins_mx>;
  872. pinctrl-1 = <&spi6_sleep_pins_mx>;
  873. cs-gpios = <&gpioz 3 0>;
  874. status = "okay";
  875. spidev6: spidev6@0{
  876. compatible = "rohm,dh2228fv";
  877. spi-max-frequency = <30000000>;
  878. reg = <0>;
  879. };
  880. };
  881. &usart2 {
  882. pinctrl-names = "default", "sleep", "idle";
  883. pinctrl-0 = <&usart2_pins_mx>;
  884. pinctrl-1 = <&usart2_sleep_pins_mx>;
  885. pinctrl-2 = <&usart2_idle_pins_mx>;
  886. status = "okay";
  887. };
  888. &uart5 {
  889. pinctrl-names = "default", "sleep", "idle";
  890. pinctrl-0 = <&uart5_pins_mx>;
  891. pinctrl-1 = <&uart5_sleep_pins_mx>;
  892. pinctrl-2 = <&uart5_idle_pins_mx>;
  893. status = "okay";
  894. };
  895. &uart7 {
  896. pinctrl-names = "default", "sleep", "idle";
  897. pinctrl-0 = <&uart7_pins_mx>;
  898. pinctrl-1 = <&uart7_sleep_pins_mx>;
  899. pinctrl-2 = <&uart7_idle_pins_mx>;
  900. status = "okay";
  901. };
  902. &uart8 {
  903. pinctrl-names = "default", "sleep", "idle";
  904. pinctrl-0 = <&uart8_pins_mx>;
  905. pinctrl-1 = <&uart8_sleep_pins_mx>;
  906. pinctrl-2 = <&uart8_idle_pins_mx>;
  907. status = "okay";
  908. };
  909. &m_can1 {
  910. pinctrl-names = "default";
  911. pinctrl-0 = <&m_can1_pins_mx>;
  912. status = "okay";
  913. can-transceiver {
  914. max-bitrate = <5000000>;
  915. };
  916. };
  917. &timers1 {
  918. status = "okay";
  919. /* spare dmas for other usage */
  920. /delete-property/dmas;
  921. /delete-property/dma-names;
  922. pwm1: pwm {
  923. pinctrl-names = "default", "sleep";
  924. pinctrl-0 = <&pwm1_pins_mx>;
  925. pinctrl-1 = <&pwm1_sleep_pins_mx>;
  926. status = "okay";
  927. };
  928. };
  929. &timers3 {
  930. status = "okay";
  931. /* spare dmas for other usage */
  932. /delete-property/dmas;
  933. /delete-property/dma-names;
  934. pwm3: pwm {
  935. pinctrl-names = "default", "sleep";
  936. pinctrl-0 = <&pwm3_pins_mx>;
  937. pinctrl-1 = <&pwm3_sleep_pins_mx>;
  938. status = "okay";
  939. };
  940. };
  941. &timers4 {
  942. status = "okay";
  943. /* spare dmas for other usage */
  944. /delete-property/dmas;
  945. /delete-property/dma-names;
  946. pwm4: pwm {
  947. pinctrl-names = "default", "sleep";
  948. pinctrl-0 = <&pwm4_pins_mx>;
  949. pinctrl-1 = <&pwm4_sleep_pins_mx>;
  950. status = "okay";
  951. };
  952. };
  953. &timers8 {
  954. status = "okay";
  955. /* spare dmas for other usage */
  956. /delete-property/dmas;
  957. /delete-property/dma-names;
  958. pwm8: pwm {
  959. pinctrl-names = "default", "sleep";
  960. pinctrl-0 = <&pwm8_pins_mx>;
  961. pinctrl-1 = <&pwm8_sleep_pins_mx>;
  962. status = "okay";
  963. };
  964. };
  965. &timers12 {
  966. status = "okay";
  967. /* spare dmas for other usage */
  968. /delete-property/dmas;
  969. /delete-property/dma-names;
  970. pwm12: pwm {
  971. pinctrl-names = "default", "sleep";
  972. pinctrl-0 = <&pwm12_pins_mx>;
  973. pinctrl-1 = <&pwm12_sleep_pins_mx>;
  974. status = "okay";
  975. };
  976. };