at91-sama5d3_acqua.dts 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340
  1. /*
  2. * acme-acqua.dts - Device Tree file for Acqua A5 Board
  3. *
  4. * Copyright (C) 2014 Atmel,
  5. * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
  6. *
  7. * 2022 Sergio Tanzilli <tanzilli@acmesystems.it>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /dts-v1/;
  12. #include "sama5d31.dtsi"
  13. / {
  14. model = "Acme Systems Acqua SOM";
  15. compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
  16. chosen {
  17. stdout-path = "serial0:115200n8";
  18. bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait net.ifnames=0";
  19. };
  20. memory {
  21. reg = <0x20000000 0x10000000>;
  22. };
  23. clocks {
  24. slow_xtal {
  25. clock-frequency = <32768>;
  26. };
  27. main_xtal {
  28. clock-frequency = <12000000>;
  29. };
  30. };
  31. ahb {
  32. apb {
  33. hlcdc: hlcdc@f0030000 {
  34. status = "disabled";
  35. hlcdc-display-controller {
  36. pinctrl-names = "default";
  37. pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
  38. port@0 {
  39. hlcdc_panel_output: endpoint@0 {
  40. remote-endpoint = <&panel_input>;
  41. };
  42. };
  43. };
  44. };
  45. /* MicroSD mounted on the SOM */
  46. mmc0: mmc@f0000000 {
  47. pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
  48. status = "okay";
  49. slot@0 {
  50. reg = <0>;
  51. bus-width = <4>;
  52. };
  53. };
  54. /* Optional MicroSD to mount on the carrier board */
  55. mmc1: mmc@f8000000 {
  56. pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
  57. status = "disabled";
  58. slot@0 {
  59. reg = <0>;
  60. bus-width = <4>;
  61. cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
  62. };
  63. };
  64. spi0: spi@f0004000 {
  65. cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
  66. status = "disabled";
  67. };
  68. can0: can@f000c000 {
  69. status = "disabled";
  70. };
  71. tcb0: timer@f0010000 {
  72. timer0: timer@0 {
  73. compatible = "atmel,tcb-timer";
  74. reg = <0>;
  75. };
  76. timer1: timer@1 {
  77. compatible = "atmel,tcb-timer";
  78. reg = <1>;
  79. };
  80. };
  81. i2c0: i2c@f0014000 {
  82. pinctrl-0 = <&pinctrl_i2c0_pu>;
  83. status = "disabled";
  84. };
  85. i2c1: i2c@f0018000 {
  86. status = "disabled";
  87. };
  88. macb1: ethernet@f802c000 {
  89. compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
  90. status = "okay";
  91. phy-mode = "rmii";
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. nvmem-cells = <&eth0_addr>;
  95. nvmem-cell-names = "mac-address";
  96. phy0: ethernet-phy@1 {
  97. interrupt-parent = <&pioE>;
  98. interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
  99. reg = <1>;
  100. };
  101. /*ethernet-phy@1 {
  102. reg = <0x1>;
  103. };*/
  104. };
  105. /* Bit banging internal I2C to manage the AT24MAC402 chip */
  106. i2c3@ {
  107. compatible = "i2c-gpio";
  108. sda-gpios = <&pioE 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  109. scl-gpios = <&pioE 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  110. pinctrl-names = "default";
  111. pinctrl-0 = <&pinctrl_i2c3_gpio>;
  112. i2c-gpio,delay-us = <4>; /* ~178 kHz */
  113. #address-cells = <1>;
  114. #size-cells = <0>;
  115. /* EEPROM contains the eth0 MAC address */
  116. eeprom@58 {
  117. compatible = "atmel,24mac402";
  118. pagesize = <256>;
  119. read-only;
  120. reg = <0x58>;
  121. #address-cells = <1>;
  122. #size-cells = <1>;
  123. nvmem-layout {
  124. compatible = "fixed-layout";
  125. #address-cells = <1>;
  126. #size-cells = <1>;
  127. eth0_addr: eth-mac-addr@9A {
  128. reg = <0x0 0x06>;
  129. };
  130. };
  131. };
  132. };
  133. pwm0: pwm@f002c000 {
  134. pinctrl-names = "default";
  135. pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
  136. status = "disabled";
  137. };
  138. usart0: serial@f001c000 {
  139. status = "okay";
  140. };
  141. usart1: serial@f0020000 {
  142. pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
  143. status = "disabled";
  144. };
  145. uart0: serial@f0024000 {
  146. status = "disabled";
  147. };
  148. spi1: spi@f8008000 {
  149. cs-gpios = <&pioC 25 0>;
  150. status = "disabled";
  151. };
  152. adc0: adc@f8018000 {
  153. atmel,adc-vref = <3300>;
  154. atmel,adc-channels-used = <0xfe>;
  155. pinctrl-0 = <
  156. &pinctrl_adc0_adtrg
  157. &pinctrl_adc0_ad1
  158. &pinctrl_adc0_ad2
  159. &pinctrl_adc0_ad3
  160. &pinctrl_adc0_ad4
  161. &pinctrl_adc0_ad5
  162. &pinctrl_adc0_ad6
  163. &pinctrl_adc0_ad7
  164. >;
  165. status = "disabled";
  166. };
  167. i2c2: i2c@f801c000 {
  168. dmas = <0>, <0>; /* Do not use DMA for i2c2 */
  169. pinctrl-0 = <&pinctrl_i2c2_pu>;
  170. status = "disabled";
  171. };
  172. dbgu: serial@ffffee00 {
  173. status = "okay";
  174. };
  175. pinctrl@fffff200 {
  176. atmel,mux-mask = <
  177. /* A B C */
  178. 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
  179. 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
  180. 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
  181. 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
  182. 0xfffffff9 0xbf9f8000 0x18000000 /* pioE */
  183. /* 0xffffffff 0xb8000000 0x18000000 */ /* pioE */
  184. >;
  185. board {
  186. pinctrl_i2c0_pu: i2c0_pu {
  187. atmel,pins =
  188. <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  189. <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  190. };
  191. pinctrl_i2c2_pu: i2c2_pu {
  192. atmel,pins =
  193. <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  194. <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  195. };
  196. pinctrl_i2c3_gpio: i2c3-gpio {
  197. atmel,pins =
  198. <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
  199. AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
  200. };
  201. pinctrl_key_gpio: key_gpio_0 {
  202. atmel,pins =
  203. <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
  204. };
  205. pinctrl_mmc0_cd: mmc0_cd {
  206. atmel,pins =
  207. <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
  208. };
  209. pinctrl_mmc1_cd: mmc1_cd {
  210. atmel,pins =
  211. <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
  212. };
  213. pinctrl_usba_vbus: usba_vbus {
  214. atmel,pins =
  215. <AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
  216. };
  217. pinctrl_gpio_leds: gpio_leds_default {
  218. atmel,pins =
  219. <AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
  220. AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
  221. AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
  222. AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
  223. };
  224. };
  225. };
  226. };
  227. usb0: gadget@500000 {
  228. status = "disabled";
  229. };
  230. usb1: ohci@600000 {
  231. status = "okay";
  232. };
  233. usb2: ehci@700000 {
  234. status = "okay";
  235. };
  236. };
  237. panel: panel {
  238. /* compatible = "acme,43inch", "simple-panel"; */
  239. compatible = "acme,50inch", "simple-panel";
  240. /* compatible = "acme,70inch", "simple-panel"; */
  241. status = "disable";
  242. port@0 {
  243. panel_input: endpoint@0 {
  244. remote-endpoint = <&hlcdc_panel_output>;
  245. };
  246. };
  247. };
  248. leds {
  249. compatible = "gpio-leds";
  250. pinctrl-names = "default";
  251. pinctrl-0 = <&pinctrl_gpio_leds>;
  252. led0 {
  253. label = "led0";
  254. gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
  255. default-state = "off";
  256. };
  257. led1 {
  258. label = "led1";
  259. gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
  260. default-state = "off";
  261. };
  262. led2 {
  263. label = "led2";
  264. gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
  265. linux,default-trigger = "heartbeat";
  266. };
  267. led3 {
  268. label = "led3";
  269. gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
  270. linux,default-trigger = "mmc0";
  271. default-state = "off";
  272. };
  273. };
  274. };