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@@ -12,6 +12,7 @@ BR2_TARGET_ARM_TRUSTED_FIRMWARE_FIP=y
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_UBOOT_AS_BL33=y
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_UBOOT_AS_BL33=y
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_TARGETS="mrvl_flash"
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_TARGETS="mrvl_flash"
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_VARIABLES="USE_COHERENT_MEM=0"
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BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_VARIABLES="USE_COHERENT_MEM=0"
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+# BR2_TARGET_ARM_TRUSTED_FIRMWARE_SSP is not set
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BR2_TARGET_BINARIES_MARVELL=y
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BR2_TARGET_BINARIES_MARVELL=y
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BR2_TARGET_MV_DDR_MARVELL=y
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BR2_TARGET_MV_DDR_MARVELL=y
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