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+From 07453188b18a2cbe815917dbb893b4ebfdd793b6 Mon Sep 17 00:00:00 2001
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+From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>
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+Date: Fri, 26 Aug 2016 10:23:20 +0000
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+Subject: [PATCH] [ARM] PR target/70473: Reduce size of Cortex-A8 automaton
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+
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+ PR target/70473
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+ * config/arm/cortex-a8-neon.md (cortex_a8_vfp_muld): Reduce
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+ reservation duration to 15 cycles.
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+ (cortex_a8_vfp_macs): Likewise.
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+ (cortex_a8_vfp_macd): Likewise.
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+ (cortex_a8_vfp_divs): Likewise.
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+ (cortex_a8_vfp_divd): Likewise.
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+
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+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@239772
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+138bc75d-0d04-0410-961f-82ee72b054a4
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+
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+[Backport from gcc upstream commit 79f5d5e3cd5a668d5ecb2b6b0cce80ef5706ac53.]
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+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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+---
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+ gcc/config/arm/cortex-a8-neon.md | 14 +++++++++-----
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+ 1 file changed, 9 insertions(+), 5 deletions(-)
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+
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+diff --git a/gcc/config/arm/cortex-a8-neon.md b/gcc/config/arm/cortex-a8-neon.md
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+index 45f861f..b16c299 100644
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+--- a/gcc/config/arm/cortex-a8-neon.md
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++++ b/gcc/config/arm/cortex-a8-neon.md
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+@@ -357,30 +357,34 @@
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+ (eq_attr "type" "fmuls"))
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+ "cortex_a8_vfp,cortex_a8_vfplite*11")
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+
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++;; Don't model a reservation for more than 15 cycles as this explodes the
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++;; state space of the automaton for little gain. It is unlikely that the
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++;; scheduler will find enough instructions to hide the full latency of the
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++;; instructions.
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+ (define_insn_reservation "cortex_a8_vfp_muld" 17
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+ (and (eq_attr "tune" "cortexa8")
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+ (eq_attr "type" "fmuld"))
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+- "cortex_a8_vfp,cortex_a8_vfplite*16")
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++ "cortex_a8_vfp,cortex_a8_vfplite*15")
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+
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+ (define_insn_reservation "cortex_a8_vfp_macs" 21
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+ (and (eq_attr "tune" "cortexa8")
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+ (eq_attr "type" "fmacs,ffmas"))
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+- "cortex_a8_vfp,cortex_a8_vfplite*20")
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++ "cortex_a8_vfp,cortex_a8_vfplite*15")
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+
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+ (define_insn_reservation "cortex_a8_vfp_macd" 26
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+ (and (eq_attr "tune" "cortexa8")
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+ (eq_attr "type" "fmacd,ffmad"))
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+- "cortex_a8_vfp,cortex_a8_vfplite*25")
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++ "cortex_a8_vfp,cortex_a8_vfplite*15")
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+
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+ (define_insn_reservation "cortex_a8_vfp_divs" 37
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+ (and (eq_attr "tune" "cortexa8")
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+ (eq_attr "type" "fdivs, fsqrts"))
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+- "cortex_a8_vfp,cortex_a8_vfplite*36")
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++ "cortex_a8_vfp,cortex_a8_vfplite*15")
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+
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+ (define_insn_reservation "cortex_a8_vfp_divd" 65
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+ (and (eq_attr "tune" "cortexa8")
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+ (eq_attr "type" "fdivd, fsqrtd"))
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+- "cortex_a8_vfp,cortex_a8_vfplite*64")
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++ "cortex_a8_vfp,cortex_a8_vfplite*15")
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+
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+ ;; Comparisons can actually take 7 cycles sometimes instead of four,
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+ ;; but given all the other instructions lumped into type=ffarith that
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+--
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+2.7.4
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+
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