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+From 39ec366414a52eec3ac9db6b639965fef78601e3 Mon Sep 17 00:00:00 2001
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+From: Haavard Skinnemoen <hskinnemoen@atmel.com>
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+Date: Wed, 31 Oct 2007 20:38:48 +0100
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+Subject: [PATCH] Oprofile: Add support for AVR32
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+
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+Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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+---
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+ events/Makefile.am | 1 +
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+ events/avr32/events | 27 +++++++++++++++++++++++++++
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+ events/avr32/unit_masks | 4 ++++
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+ libop/op_cpu_type.c | 1 +
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+ libop/op_cpu_type.h | 1 +
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+ libop/op_events.c | 1 +
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+ utils/ophelp.c | 5 +++++
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+ 7 files changed, 40 insertions(+), 0 deletions(-)
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+ create mode 100644 events/avr32/events
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+ create mode 100644 events/avr32/unit_masks
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+
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+diff --git a/events/Makefile.am b/events/Makefile.am
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+index 6efaa2e..4681d34 100644
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+--- a/events/Makefile.am
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++++ b/events/Makefile.am
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+@@ -32,6 +32,7 @@ event_files = \
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+ arm/xscale2/events arm/xscale2/unit_masks \
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+ arm/armv6/events arm/armv6/unit_masks \
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+ arm/mpcore/events arm/mpcore/unit_masks \
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++ avr32/events avr32/unit_masks \
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+ mips/20K/events mips/20K/unit_masks \
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+ mips/24K/events mips/24K/unit_masks \
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+ mips/25K/events mips/25K/unit_masks \
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+diff --git a/events/avr32/events b/events/avr32/events
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+new file mode 100644
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+index 0000000..489d914
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+--- /dev/null
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++++ b/events/avr32/events
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+@@ -0,0 +1,27 @@
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++# AVR32 events
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++#
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++event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses
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++event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
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++event:0x02 counters:1,2 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall due to data dependency
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++event:0x03 counters:1,2 um:zero minimum:500 name:ITLB_MISS : number of Instruction TLB misses
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++event:0x04 counters:1,2 um:zero minimum:500 name:DTLB_MISS : number of Data TLB misses
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++event:0x05 counters:1,2 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change
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++event:0x06 counters:1,2 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted
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++event:0x07 counters:1,2 um:zero minimum:500 name:INSN_EXECUTED : instructions executed
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++event:0x08 counters:1,2 um:zero minimum:500 name:DCACHE_WBUF_FULL : data cache write buffers full
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++event:0x09 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_WBUF_FULL : cycles stalled due to data cache write buffers full
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++event:0x0a counters:1,2 um:zero minimum:500 name:DCACHE_READ_MISS : data cache read miss
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++event:0x0b counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_READ_MISS : cycles stalled due to data cache read miss
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++event:0x0c counters:1,2 um:zero minimum:500 name:WRITE_ACCESS : write access
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++event:0x0d counters:1,2 um:zero minimum:500 name:CYCLES_WRITE_ACCESS : cycles when write access is ongoing
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++event:0x0e counters:1,2 um:zero minimum:500 name:READ_ACCESS : read access
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++event:0x0f counters:1,2 um:zero minimum:500 name:CYCLES_READ_ACCESS : cycles when read access is ongoing
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++event:0x10 counters:1,2 um:zero minimum:500 name:CACHE_STALL : read or write access that stalled
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++event:0x11 counters:1,2 um:zero minimum:500 name:CYCLES_CACHE_STALL : cycles stalled doing read or write access
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++event:0x12 counters:1,2 um:zero minimum:500 name:DCACHE_ACCESS : data cache access
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++event:0x13 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_ACCESS : cycles when data cache access is ongoing
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++event:0x14 counters:1,2 um:zero minimum:500 name:DCACHE_WB : data cache line writeback
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++event:0x15 counters:1,2 um:zero minimum:500 name:ACCUMULATOR_HIT : accumulator cache hit
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++event:0x16 counters:1,2 um:zero minimum:500 name:ACCUMULATOR_MISS : accumulator cache miss
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++event:0x17 counters:1,2 um:zero minimum:500 name:BTB_HIT : branch target buffer hit
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++event:0xff counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter
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+diff --git a/events/avr32/unit_masks b/events/avr32/unit_masks
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+new file mode 100644
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+index 0000000..37d9839
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+--- /dev/null
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++++ b/events/avr32/unit_masks
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+@@ -0,0 +1,4 @@
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++# AVR32 performance counters possible unit masks
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++#
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++name:zero type:mandatory default:0x00
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++ 0x00 No unit mask
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+diff --git a/libop/op_cpu_type.c b/libop/op_cpu_type.c
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+index 04647f0..023397c 100644
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+--- a/libop/op_cpu_type.c
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++++ b/libop/op_cpu_type.c
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+@@ -72,6 +72,7 @@ static struct cpu_descr const cpu_descrs[MAX_CPU_TYPE] = {
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+ { "ARM MPCore", "arm/mpcore", CPU_ARM_MPCORE, 2 },
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+ { "ARM V6 PMU", "arm/armv6", CPU_ARM_V6, 3 },
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+ { "ppc64 POWER5++", "ppc64/power5++", CPU_PPC64_POWER5pp, 6 },
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++ { "AVR32", "avr32", CPU_AVR32, 3 },
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+ };
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+
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+ static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / sizeof(struct cpu_descr);
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+diff --git a/libop/op_cpu_type.h b/libop/op_cpu_type.h
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+index 5c9bde7..d2a624e 100644
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+--- a/libop/op_cpu_type.h
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++++ b/libop/op_cpu_type.h
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+@@ -70,6 +70,7 @@ typedef enum {
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+ CPU_ARM_MPCORE, /**< ARM MPCore */
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+ CPU_ARM_V6, /**< ARM V6 */
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+ CPU_PPC64_POWER5pp, /**< ppc64 Power5++ family */
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++ CPU_AVR32, /**< AVR32 */
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+ MAX_CPU_TYPE
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+ } op_cpu;
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+
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+diff --git a/libop/op_events.c b/libop/op_events.c
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+index 2b3c9a9..1ab4bcc 100644
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+--- a/libop/op_events.c
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++++ b/libop/op_events.c
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+@@ -788,6 +788,7 @@ void op_default_event(op_cpu cpu_type, struct op_default_event_descr * descr)
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+ case CPU_ARM_XSCALE2:
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+ case CPU_ARM_MPCORE:
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+ case CPU_ARM_V6:
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++ case CPU_AVR32:
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+ descr->name = "CPU_CYCLES";
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+ break;
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+
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+diff --git a/utils/ophelp.c b/utils/ophelp.c
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+index a5a7a02..10ed606 100644
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+--- a/utils/ophelp.c
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++++ b/utils/ophelp.c
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+@@ -511,6 +511,11 @@ int main(int argc, char const * argv[])
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+ "Downloadable from http://www.freescale.com\n");
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+ break;
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+
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++ case CPU_AVR32:
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++ printf("See AVR32 Architecture Manual\n"
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++ "Chapter 6: Performance Counters\n"
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++ "http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf\n");
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++
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+ case CPU_RTC:
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+ break;
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+
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+--
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+1.5.3.4
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+
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