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arch/Config.in.x86: add skylake CPU variants

Both skylake and skylake-avx512 were added in gcc 6.x. According to
https://en.wikipedia.org/wiki/Skylake_(microarchitecture) the early
Skylake processors indeed did not have AVX512 support, while the later
ones did, hence the separate gcc options.

Due to this being the first CPU we support with AVX512, this commit
adds BR2_X86_CPU_HAS_AVX512.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
Thomas Petazzoni 3 年之前
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共有 1 个文件被更改,包括 29 次插入0 次删除
  1. 29 0
      arch/Config.in.x86

+ 29 - 0
arch/Config.in.x86

@@ -19,6 +19,8 @@ config BR2_X86_CPU_HAS_AVX
 	bool
 	bool
 config BR2_X86_CPU_HAS_AVX2
 config BR2_X86_CPU_HAS_AVX2
 	bool
 	bool
+config BR2_X86_CPU_HAS_AVX512
+	bool
 
 
 choice
 choice
 	prompt "Target Architecture Variant"
 	prompt "Target Architecture Variant"
@@ -259,6 +261,18 @@ config BR2_x86_broadwell
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX2
 	select BR2_X86_CPU_HAS_AVX2
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+config BR2_x86_skylake
+	bool "skylake"
+	select BR2_X86_CPU_HAS_MMX
+	select BR2_X86_CPU_HAS_SSE
+	select BR2_X86_CPU_HAS_SSE2
+	select BR2_X86_CPU_HAS_SSE3
+	select BR2_X86_CPU_HAS_SSSE3
+	select BR2_X86_CPU_HAS_SSE4
+	select BR2_X86_CPU_HAS_SSE42
+	select BR2_X86_CPU_HAS_AVX
+	select BR2_X86_CPU_HAS_AVX2
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_x86_atom
 config BR2_x86_atom
 	bool "atom"
 	bool "atom"
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_MMX
@@ -287,6 +301,19 @@ config BR2_x86_silvermont
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+config BR2_x86_skylake_avx512
+	bool "skylake-avx512"
+	select BR2_X86_CPU_HAS_MMX
+	select BR2_X86_CPU_HAS_SSE
+	select BR2_X86_CPU_HAS_SSE2
+	select BR2_X86_CPU_HAS_SSE3
+	select BR2_X86_CPU_HAS_SSSE3
+	select BR2_X86_CPU_HAS_SSE4
+	select BR2_X86_CPU_HAS_SSE42
+	select BR2_X86_CPU_HAS_AVX
+	select BR2_X86_CPU_HAS_AVX2
+	select BR2_X86_CPU_HAS_AVX512
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_x86_k6
 config BR2_x86_k6
 	bool "k6"
 	bool "k6"
 	depends on !BR2_x86_64
 	depends on !BR2_x86_64
@@ -414,10 +441,12 @@ config BR2_GCC_TARGET_ARCH
 	default "core-avx2"	if BR2_x86_core_avx2
 	default "core-avx2"	if BR2_x86_core_avx2
 	default "haswell"	if BR2_x86_haswell
 	default "haswell"	if BR2_x86_haswell
 	default "broadwell"	if BR2_x86_broadwell
 	default "broadwell"	if BR2_x86_broadwell
+	default "skylake"	if BR2_x86_skylake
 	default "atom"		if BR2_x86_atom
 	default "atom"		if BR2_x86_atom
 	default "bonnel"	if BR2_x86_bonnel
 	default "bonnel"	if BR2_x86_bonnel
 	default "westmere"	if BR2_x86_westmere
 	default "westmere"	if BR2_x86_westmere
 	default "silvermont"	if BR2_x86_silvermont
 	default "silvermont"	if BR2_x86_silvermont
+	default "skylake-avx512" if BR2_x86_skylake_avx512
 	default "k8"		if BR2_x86_opteron
 	default "k8"		if BR2_x86_opteron
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "barcelona"	if BR2_x86_barcelona
 	default "barcelona"	if BR2_x86_barcelona