board/orangepi/orangepi-zero: make the patches to be applied with fuzz 0

This commit allows the Linux kernel patches to be applied with fuzz
factor 0. The fuzz factor specifies how many lines of the patch can be
inexactly matched, so the value 0 requires all lines to be exactly
matched.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Arnout Vandecappelle <arnout@mind.be>

board/orangepi/orangepi-zero/patches/linux/0002-ARM-dts-orange-pi-zero-enable-spi-nor.patch

@@ -1,4 +1,4 @@
-From 068c3baff3048a3db4ef2518ff917ce749cd8169 Mon Sep 17 00:00:00 2001
+From ddc295a04269437e5c726f63239689786354d44b Mon Sep 17 00:00:00 2001
 From: Sergey Matyukevich <geomatsi@gmail.com>
 Date: Sat, 20 May 2017 11:24:26 +0300
 Subject: [PATCH] ARM: dts: orange-pi-zero: enable SPI NOR
@@ -9,34 +9,37 @@ For more information see:
 - http://linux-sunxi.org/Orange_Pi_Zero#SPI_NOR_flash
 
 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
+[Dario: make the patch to be applied with fuzz factor 0]
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
+ .../boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts    | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-index 4e1a9050c6b4..cdf19821b1f3 100644
+index 6b74cc923e16..4012f8712cd7 100644
 --- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
 +++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-@@ -161,3 +161,19 @@
- 	/* USB VBUS is always on */
- 	status = "okay";
- };
-+
-+&spi0 {
+@@ -167,14 +167,18 @@ &ohci1 {
+ 
+ &spi0 {
+ 	/* Disable SPI NOR by default: it optional on Orange Pi Zero boards */
+-	status = "disabled";
 +	status = "okay";
-+
-+	flash@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
+ 
+ 	flash@0 {
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+-		compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
 +		compatible = "mxicy,mx25l1606e", "winbond,w25q128";
-+		reg = <0>;
-+		spi-max-frequency = <40000000>;
+ 		reg = <0>;
+ 		spi-max-frequency = <40000000>;
 +
 +		partition@00000000 {
 +			reg = <0x00000000 0x200000>;	/* 2Mb */
 +		};
-+	};
-+};
+ 	};
+ };
+ 
 -- 
-2.11.0
+2.43.0
 

board/orangepi/orangepi-zero/patches/linux/0003-ARM-dts-orange-pi-zero-enable-spidev.patch

@@ -1,4 +1,4 @@
-From 8dd1b2a696bb7e9914abd11cc6f5c0f54c33d626 Mon Sep 17 00:00:00 2001
+From 208b13119fc0f709935fc2fc13c0295b19edbbf5 Mon Sep 17 00:00:00 2001
 From: Sergey Matyukevich <geomatsi@gmail.com>
 Date: Sat, 20 May 2017 15:36:51 +0300
 Subject: [PATCH] ARM: dts: orange-pi-zero: enable spidev
@@ -7,27 +7,28 @@ On orange-pi-zero board SPI1 pins are accessible via GPIO expansion port.
 This patch enables spidev driver for SPI1.
 
 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
+[Dario: make the patch to be applied with fuzz factor 0]
+Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 11 +++++++++++
+ .../dts/allwinner/sun8i-h2-plus-orangepi-zero.dts     | 11 +++++++++++
  1 file changed, 11 insertions(+)
 
 diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-index cdf19821b1f3..7242aaecb14f 100644
+index 4012f8712cd7..3552eb312747 100644
 --- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
 +++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-@@ -59,6 +59,7 @@
- 		serial0 = &uart0;
+@@ -59,6 +59,7 @@ aliases {
  		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ 		ethernet0 = &emac;
  		ethernet1 = &xr819;
 +		spi1 = &spi1;
  	};
  
  	chosen {
-@@ -177,3 +178,13 @@
- 		};
+@@ -182,6 +183,16 @@ partition@00000000 {
  	};
  };
-+
+ 
 +&spi1 {
 +	status = "okay";
 +
@@ -37,6 +38,10 @@ index cdf19821b1f3..7242aaecb14f 100644
 +		spi-max-frequency = <10000000>;
 +	};
 +};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_pa_pins>;
 -- 
-2.11.0
+2.43.0