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@@ -33,6 +33,23 @@ config BR2_XTENSA_OVERLAY_DIR
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configurations. They are provided by the processor vendor or
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configurations. They are provided by the processor vendor or
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directly from Tensilica.
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directly from Tensilica.
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+choice
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+ prompt "Target Architecture Endianness"
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+ depends on BR2_XTENSA_CUSTOM
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+ default BR2_XTENSA_LITTLE_ENDIAN
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+
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+config BR2_XTENSA_LITTLE_ENDIAN
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+ bool "Little endian"
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+
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+config BR2_XTENSA_BIG_ENDIAN
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+ bool "Big endian"
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+
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+endchoice
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+
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+config BR2_ENDIAN
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+ default "LITTLE" if BR2_XTENSA_LITTLE_ENDIAN
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+ default "BIG" if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
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+
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config BR2_ARCH
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config BR2_ARCH
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default "xtensa" if BR2_xtensa
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default "xtensa" if BR2_xtensa
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