tm4c1231e6pz_startup_ccs.c 14 KB

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  1. //*****************************************************************************
  2. //
  3. // Startup code for use with TI's Code Composer Studio.
  4. //
  5. // Copyright (c) 2011-2014 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Software License Agreement
  9. //
  10. // Texas Instruments (TI) is supplying this software for use solely and
  11. // exclusively on TI's microcontroller products. The software is owned by
  12. // TI and/or its suppliers, and is protected under applicable copyright
  13. // laws. You may not combine this software with "viral" open-source
  14. // software in order to form a larger program.
  15. //
  16. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  17. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  18. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  20. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  21. // DAMAGES, FOR ANY REASON WHATSOEVER.
  22. //
  23. //*****************************************************************************
  24. #include <stdint.h>
  25. //*****************************************************************************
  26. //
  27. // Forward declaration of the default fault handlers.
  28. //
  29. //*****************************************************************************
  30. void ResetISR(void);
  31. static void NmiSR(void);
  32. static void FaultISR(void);
  33. static void IntDefaultHandler(void);
  34. //*****************************************************************************
  35. //
  36. // External declaration for the reset handler that is to be called when the
  37. // processor is started
  38. //
  39. //*****************************************************************************
  40. extern void _c_int00(void);
  41. //*****************************************************************************
  42. //
  43. // Linker variable that marks the top of the stack.
  44. //
  45. //*****************************************************************************
  46. extern uint32_t __STACK_TOP;
  47. //*****************************************************************************
  48. //
  49. // External declarations for the interrupt handlers used by the application.
  50. //
  51. //*****************************************************************************
  52. // To be added by user
  53. //*****************************************************************************
  54. //
  55. // The vector table. Note that the proper constructs must be placed on this to
  56. // ensure that it ends up at physical address 0x0000.0000 or at the start of
  57. // the program if located at a start address other than 0.
  58. //
  59. //*****************************************************************************
  60. #pragma DATA_SECTION(g_pfnVectors, ".intvecs")
  61. void (* const g_pfnVectors[])(void) =
  62. {
  63. (void (*)(void))((uint32_t)&__STACK_TOP),
  64. // The initial stack pointer
  65. ResetISR, // The reset handler
  66. NmiSR, // The NMI handler
  67. FaultISR, // The hard fault handler
  68. IntDefaultHandler, // The MPU fault handler
  69. IntDefaultHandler, // The bus fault handler
  70. IntDefaultHandler, // The usage fault handler
  71. 0, // Reserved
  72. 0, // Reserved
  73. 0, // Reserved
  74. 0, // Reserved
  75. IntDefaultHandler, // SVCall handler
  76. IntDefaultHandler, // Debug monitor handler
  77. 0, // Reserved
  78. IntDefaultHandler, // The PendSV handler
  79. IntDefaultHandler, // The SysTick handler
  80. IntDefaultHandler, // GPIO Port A
  81. IntDefaultHandler, // GPIO Port B
  82. IntDefaultHandler, // GPIO Port C
  83. IntDefaultHandler, // GPIO Port D
  84. IntDefaultHandler, // GPIO Port E
  85. IntDefaultHandler, // UART0 Rx and Tx
  86. IntDefaultHandler, // UART1 Rx and Tx
  87. IntDefaultHandler, // SSI0 Rx and Tx
  88. IntDefaultHandler, // I2C0 Master and Slave
  89. IntDefaultHandler, // PWM Fault
  90. IntDefaultHandler, // PWM Generator 0
  91. IntDefaultHandler, // PWM Generator 1
  92. IntDefaultHandler, // PWM Generator 2
  93. IntDefaultHandler, // Quadrature Encoder 0
  94. IntDefaultHandler, // ADC Sequence 0
  95. IntDefaultHandler, // ADC Sequence 1
  96. IntDefaultHandler, // ADC Sequence 2
  97. IntDefaultHandler, // ADC Sequence 3
  98. IntDefaultHandler, // Watchdog timer
  99. IntDefaultHandler, // Timer 0 subtimer A
  100. IntDefaultHandler, // Timer 0 subtimer B
  101. IntDefaultHandler, // Timer 1 subtimer A
  102. IntDefaultHandler, // Timer 1 subtimer B
  103. IntDefaultHandler, // Timer 2 subtimer A
  104. IntDefaultHandler, // Timer 2 subtimer B
  105. IntDefaultHandler, // Analog Comparator 0
  106. IntDefaultHandler, // Analog Comparator 1
  107. IntDefaultHandler, // Analog Comparator 2
  108. IntDefaultHandler, // System Control (PLL, OSC, BO)
  109. IntDefaultHandler, // FLASH Control
  110. IntDefaultHandler, // GPIO Port F
  111. IntDefaultHandler, // GPIO Port G
  112. IntDefaultHandler, // GPIO Port H
  113. IntDefaultHandler, // UART2 Rx and Tx
  114. IntDefaultHandler, // SSI1 Rx and Tx
  115. IntDefaultHandler, // Timer 3 subtimer A
  116. IntDefaultHandler, // Timer 3 subtimer B
  117. IntDefaultHandler, // I2C1 Master and Slave
  118. IntDefaultHandler, // Quadrature Encoder 1
  119. IntDefaultHandler, // CAN0
  120. IntDefaultHandler, // CAN1
  121. 0, // Reserved
  122. 0, // Reserved
  123. IntDefaultHandler, // Hibernate
  124. IntDefaultHandler, // USB0
  125. IntDefaultHandler, // PWM Generator 3
  126. IntDefaultHandler, // uDMA Software Transfer
  127. IntDefaultHandler, // uDMA Error
  128. IntDefaultHandler, // ADC1 Sequence 0
  129. IntDefaultHandler, // ADC1 Sequence 1
  130. IntDefaultHandler, // ADC1 Sequence 2
  131. IntDefaultHandler, // ADC1 Sequence 3
  132. 0, // Reserved
  133. 0, // Reserved
  134. IntDefaultHandler, // GPIO Port J
  135. IntDefaultHandler, // GPIO Port K
  136. IntDefaultHandler, // GPIO Port L
  137. IntDefaultHandler, // SSI2 Rx and Tx
  138. IntDefaultHandler, // SSI3 Rx and Tx
  139. IntDefaultHandler, // UART3 Rx and Tx
  140. IntDefaultHandler, // UART4 Rx and Tx
  141. IntDefaultHandler, // UART5 Rx and Tx
  142. IntDefaultHandler, // UART6 Rx and Tx
  143. IntDefaultHandler, // UART7 Rx and Tx
  144. 0, // Reserved
  145. 0, // Reserved
  146. 0, // Reserved
  147. 0, // Reserved
  148. IntDefaultHandler, // I2C2 Master and Slave
  149. IntDefaultHandler, // I2C3 Master and Slave
  150. IntDefaultHandler, // Timer 4 subtimer A
  151. IntDefaultHandler, // Timer 4 subtimer B
  152. 0, // Reserved
  153. 0, // Reserved
  154. 0, // Reserved
  155. 0, // Reserved
  156. 0, // Reserved
  157. 0, // Reserved
  158. 0, // Reserved
  159. 0, // Reserved
  160. 0, // Reserved
  161. 0, // Reserved
  162. 0, // Reserved
  163. 0, // Reserved
  164. 0, // Reserved
  165. 0, // Reserved
  166. 0, // Reserved
  167. 0, // Reserved
  168. 0, // Reserved
  169. 0, // Reserved
  170. 0, // Reserved
  171. 0, // Reserved
  172. IntDefaultHandler, // Timer 5 subtimer A
  173. IntDefaultHandler, // Timer 5 subtimer B
  174. IntDefaultHandler, // Wide Timer 0 subtimer A
  175. IntDefaultHandler, // Wide Timer 0 subtimer B
  176. IntDefaultHandler, // Wide Timer 1 subtimer A
  177. IntDefaultHandler, // Wide Timer 1 subtimer B
  178. IntDefaultHandler, // Wide Timer 2 subtimer A
  179. IntDefaultHandler, // Wide Timer 2 subtimer B
  180. IntDefaultHandler, // Wide Timer 3 subtimer A
  181. IntDefaultHandler, // Wide Timer 3 subtimer B
  182. IntDefaultHandler, // Wide Timer 4 subtimer A
  183. IntDefaultHandler, // Wide Timer 4 subtimer B
  184. IntDefaultHandler, // Wide Timer 5 subtimer A
  185. IntDefaultHandler, // Wide Timer 5 subtimer B
  186. IntDefaultHandler, // FPU
  187. 0, // Reserved
  188. 0, // Reserved
  189. IntDefaultHandler, // I2C4 Master and Slave
  190. IntDefaultHandler, // I2C5 Master and Slave
  191. IntDefaultHandler, // GPIO Port M
  192. IntDefaultHandler, // GPIO Port N
  193. IntDefaultHandler, // Quadrature Encoder 2
  194. 0, // Reserved
  195. 0, // Reserved
  196. IntDefaultHandler, // GPIO Port P (Summary or P0)
  197. IntDefaultHandler, // GPIO Port P1
  198. IntDefaultHandler, // GPIO Port P2
  199. IntDefaultHandler, // GPIO Port P3
  200. IntDefaultHandler, // GPIO Port P4
  201. IntDefaultHandler, // GPIO Port P5
  202. IntDefaultHandler, // GPIO Port P6
  203. IntDefaultHandler, // GPIO Port P7
  204. IntDefaultHandler, // GPIO Port Q (Summary or Q0)
  205. IntDefaultHandler, // GPIO Port Q1
  206. IntDefaultHandler, // GPIO Port Q2
  207. IntDefaultHandler, // GPIO Port Q3
  208. IntDefaultHandler, // GPIO Port Q4
  209. IntDefaultHandler, // GPIO Port Q5
  210. IntDefaultHandler, // GPIO Port Q6
  211. IntDefaultHandler, // GPIO Port Q7
  212. IntDefaultHandler, // GPIO Port R
  213. IntDefaultHandler, // GPIO Port S
  214. IntDefaultHandler, // PWM 1 Generator 0
  215. IntDefaultHandler, // PWM 1 Generator 1
  216. IntDefaultHandler, // PWM 1 Generator 2
  217. IntDefaultHandler, // PWM 1 Generator 3
  218. IntDefaultHandler // PWM 1 Fault
  219. };
  220. //*****************************************************************************
  221. //
  222. // This is the code that gets called when the processor first starts execution
  223. // following a reset event. Only the absolutely necessary set is performed,
  224. // after which the application supplied entry() routine is called. Any fancy
  225. // actions (such as making decisions based on the reset cause register, and
  226. // resetting the bits in that register) are left solely in the hands of the
  227. // application.
  228. //
  229. //*****************************************************************************
  230. void
  231. ResetISR(void)
  232. {
  233. //
  234. // Jump to the CCS C initialization routine. This will enable the
  235. // floating-point unit as well, so that does not need to be done here.
  236. //
  237. __asm(" .global _c_int00\n"
  238. " b.w _c_int00");
  239. }
  240. //*****************************************************************************
  241. //
  242. // This is the code that gets called when the processor receives a NMI. This
  243. // simply enters an infinite loop, preserving the system state for examination
  244. // by a debugger.
  245. //
  246. //*****************************************************************************
  247. static void
  248. NmiSR(void)
  249. {
  250. //
  251. // Enter an infinite loop.
  252. //
  253. while(1)
  254. {
  255. }
  256. }
  257. //*****************************************************************************
  258. //
  259. // This is the code that gets called when the processor receives a fault
  260. // interrupt. This simply enters an infinite loop, preserving the system state
  261. // for examination by a debugger.
  262. //
  263. //*****************************************************************************
  264. static void
  265. FaultISR(void)
  266. {
  267. //
  268. // Enter an infinite loop.
  269. //
  270. while(1)
  271. {
  272. }
  273. }
  274. //*****************************************************************************
  275. //
  276. // This is the code that gets called when the processor receives an unexpected
  277. // interrupt. This simply enters an infinite loop, preserving the system state
  278. // for examination by a debugger.
  279. //
  280. //*****************************************************************************
  281. static void
  282. IntDefaultHandler(void)
  283. {
  284. //
  285. // Go into an infinite loop.
  286. //
  287. while(1)
  288. {
  289. }
  290. }