|
@@ -15,8 +15,8 @@
|
|
static HFIFO g_hFifoTX = NULL, g_hFifoRX = NULL;
|
|
static HFIFO g_hFifoTX = NULL, g_hFifoRX = NULL;
|
|
static volatile uint32_t g_nTxEchoCount = 0;
|
|
static volatile uint32_t g_nTxEchoCount = 0;
|
|
static volatile uint64_t g_nTimerTick = 0;
|
|
static volatile uint64_t g_nTimerTick = 0;
|
|
-static UART_STATUS_COUNTERS g_statCnt = {0};
|
|
|
|
-static UART_CONFIG g_uartCfg = {0};
|
|
|
|
|
|
+static GFA_UART_STATUS_COUNTERS g_statCnt = {0};
|
|
|
|
+static GFA_UART_CONFIG g_uartCfg = {0};
|
|
static uint64_t g_MODBUS_RTU_FRAME_TIMEOUT_US = 0;
|
|
static uint64_t g_MODBUS_RTU_FRAME_TIMEOUT_US = 0;
|
|
static uint64_t g_MODBUS_RTU_CHAR_TIMEOUT_US = 0;
|
|
static uint64_t g_MODBUS_RTU_CHAR_TIMEOUT_US = 0;
|
|
|
|
|
|
@@ -87,7 +87,7 @@ static void _OnTxStart(void)
|
|
{
|
|
{
|
|
uint8_t b;
|
|
uint8_t b;
|
|
|
|
|
|
- if(!UARTBusy(UART_BASE) && FifoPop(g_hFifoTX, &b, false))
|
|
|
|
|
|
+ if(!UARTBusy(UART_BASE) && GfaMbFifoPop(g_hFifoTX, &b, false))
|
|
{
|
|
{
|
|
g_nTxEchoCount++;
|
|
g_nTxEchoCount++;
|
|
GPIOPinWrite(EN_485_PORT, EN_485_PIN, EN_485_PIN); // enable the bus
|
|
GPIOPinWrite(EN_485_PORT, EN_485_PIN, EN_485_PIN); // enable the bus
|
|
@@ -106,15 +106,15 @@ static bool _OnTxFinalize(void)
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static void UART_RX_ISR(void)
|
|
|
|
|
|
+static void _UART_RX_ISR(void)
|
|
{
|
|
{
|
|
uint8_t b;
|
|
uint8_t b;
|
|
|
|
|
|
if(g_nTxEchoCount)
|
|
if(g_nTxEchoCount)
|
|
{
|
|
{
|
|
UARTCharGetNonBlocking(UART_BASE); // discard transmit echo chars
|
|
UARTCharGetNonBlocking(UART_BASE); // discard transmit echo chars
|
|
- _FrameTimerStart();
|
|
|
|
--g_nTxEchoCount;
|
|
--g_nTxEchoCount;
|
|
|
|
+ _FrameTimerStart();
|
|
return;
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -122,39 +122,39 @@ static void UART_RX_ISR(void)
|
|
|
|
|
|
if(_TimerElapsed()) // check, if the time since the last character was received, is greater than 3.5/1.5 characters
|
|
if(_TimerElapsed()) // check, if the time since the last character was received, is greater than 3.5/1.5 characters
|
|
{
|
|
{
|
|
- FifoReset(g_hFifoRX, false);
|
|
|
|
- FifoSetFlags(g_hFifoRX, MB_RTU_FLAG_FRAME_GAP_DETECT, false);
|
|
|
|
- if(FifoMatchFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false))
|
|
|
|
|
|
+ GfaMbFifoReset(g_hFifoRX, false);
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoRX, MB_RTU_FLAG_FRAME_GAP_DETECT, false);
|
|
|
|
+ if(GfaMbFifoMatchFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false))
|
|
{
|
|
{
|
|
- FifoClearFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false);
|
|
|
|
|
|
+ GfaMbFifoClearFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false);
|
|
}
|
|
}
|
|
- FifoClearFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false);
|
|
|
|
|
|
+ GfaMbFifoClearFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false);
|
|
}
|
|
}
|
|
- else if(FifoMatchFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false))
|
|
|
|
|
|
+ else if(GfaMbFifoMatchFlags(g_hFifoRX, MB_RTU_FLAG_IGNORE_FRAME, false))
|
|
{
|
|
{
|
|
UARTCharGetNonBlocking(UART_BASE); // discard chars
|
|
UARTCharGetNonBlocking(UART_BASE); // discard chars
|
|
_FrameTimerStart();
|
|
_FrameTimerStart();
|
|
return;
|
|
return;
|
|
}
|
|
}
|
|
- else if(FifoMatchFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false))
|
|
|
|
|
|
+ else if(GfaMbFifoMatchFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false))
|
|
{
|
|
{
|
|
UARTCharGetNonBlocking(UART_BASE); // discard chars
|
|
UARTCharGetNonBlocking(UART_BASE); // discard chars
|
|
- FifoReset(g_hFifoRX, false);
|
|
|
|
|
|
+ GfaMbFifoReset(g_hFifoRX, false);
|
|
return;
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
b = (uint8_t)UARTCharGetNonBlocking(UART_BASE);
|
|
b = (uint8_t)UARTCharGetNonBlocking(UART_BASE);
|
|
- FifoPush(g_hFifoRX, b, false);
|
|
|
|
|
|
+ GfaMbFifoPush(g_hFifoRX, b, false);
|
|
_CharTimerStart();
|
|
_CharTimerStart();
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static void UART_TX_ISR(void)
|
|
|
|
|
|
+static void _UART_TX_ISR(void)
|
|
{
|
|
{
|
|
uint8_t b;
|
|
uint8_t b;
|
|
|
|
|
|
- if(FifoPop(g_hFifoTX, &b, false))
|
|
|
|
|
|
+ if(GfaMbFifoPop(g_hFifoTX, &b, false))
|
|
{
|
|
{
|
|
++g_nTxEchoCount;
|
|
++g_nTxEchoCount;
|
|
UARTCharPutNonBlocking(UART_BASE, b);
|
|
UARTCharPutNonBlocking(UART_BASE, b);
|
|
@@ -164,62 +164,62 @@ static void UART_TX_ISR(void)
|
|
{
|
|
{
|
|
UARTIntDisable(UART_BASE, UART_INT_TX);
|
|
UARTIntDisable(UART_BASE, UART_INT_TX);
|
|
GPIOPinWrite(EN_485_PORT, EN_485_PIN, 0); // disable the bus
|
|
GPIOPinWrite(EN_485_PORT, EN_485_PIN, 0); // disable the bus
|
|
- FifoClearFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_IN_PROGRESS, false);
|
|
|
|
- FifoSetFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false);
|
|
|
|
|
|
+ GfaMbFifoClearFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_IN_PROGRESS, false);
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoTX, MB_RTU_FLAG_TRANSMIT_END, false);
|
|
_FrameTimerStart();
|
|
_FrameTimerStart();
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static void UART_OE_ISR(void)
|
|
|
|
|
|
+static void _UART_OE_ISR(void)
|
|
{
|
|
{
|
|
++g_statCnt.nOverrunErrors;
|
|
++g_statCnt.nOverrunErrors;
|
|
- FifoSetFlags(g_hFifoRX, MB_RTU_FLAG_OVERRUN_ERROR, false);
|
|
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoRX, MB_RTU_FLAG_OVERRUN_ERROR, false);
|
|
}
|
|
}
|
|
|
|
|
|
-static void UART_BE_ISR(void)
|
|
|
|
|
|
+static void _UART_BE_ISR(void)
|
|
{
|
|
{
|
|
++g_statCnt.nBreakErrors;
|
|
++g_statCnt.nBreakErrors;
|
|
- FifoSetFlags(g_hFifoRX, MB_RTU_FLAG_BREAK_ERROR, false);
|
|
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoRX, MB_RTU_FLAG_BREAK_ERROR, false);
|
|
}
|
|
}
|
|
|
|
|
|
-static void UART_PE_ISR(void)
|
|
|
|
|
|
+static void _UART_PE_ISR(void)
|
|
{
|
|
{
|
|
++g_statCnt.nParityErrors;
|
|
++g_statCnt.nParityErrors;
|
|
- FifoSetFlags(g_hFifoRX, MB_RTU_FLAG_PARITY_ERROR, false);
|
|
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoRX, MB_RTU_FLAG_PARITY_ERROR, false);
|
|
}
|
|
}
|
|
|
|
|
|
-static void UART_FE_ISR(void)
|
|
|
|
|
|
+static void _UART_FE_ISR(void)
|
|
{
|
|
{
|
|
++g_statCnt.nFramingErrors;
|
|
++g_statCnt.nFramingErrors;
|
|
- FifoSetFlags(g_hFifoRX, MB_RTU_FLAG_FRAMING_ERROR, false);
|
|
|
|
|
|
+ GfaMbFifoSetFlags(g_hFifoRX, MB_RTU_FLAG_FRAMING_ERROR, false);
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static void UART_ISR(void)
|
|
|
|
|
|
+static void _UART_ISR(void)
|
|
{
|
|
{
|
|
uint32_t nStatus = UARTIntStatus(UART_BASE, true); // Get the interrrupt status.
|
|
uint32_t nStatus = UARTIntStatus(UART_BASE, true); // Get the interrrupt status.
|
|
UARTIntClear(UART_BASE, nStatus); // Clear the asserted interrupts.
|
|
UARTIntClear(UART_BASE, nStatus); // Clear the asserted interrupts.
|
|
|
|
|
|
if(nStatus & UART_INT_TX)
|
|
if(nStatus & UART_INT_TX)
|
|
- UART_TX_ISR();
|
|
|
|
|
|
+ _UART_TX_ISR();
|
|
if(nStatus & UART_INT_RX)
|
|
if(nStatus & UART_INT_RX)
|
|
- UART_RX_ISR();
|
|
|
|
|
|
+ _UART_RX_ISR();
|
|
if(nStatus & UART_INT_OE) // UART Overrun Error
|
|
if(nStatus & UART_INT_OE) // UART Overrun Error
|
|
- UART_OE_ISR();
|
|
|
|
|
|
+ _UART_OE_ISR();
|
|
if(nStatus & UART_INT_BE) // UART Break Error
|
|
if(nStatus & UART_INT_BE) // UART Break Error
|
|
- UART_BE_ISR();
|
|
|
|
|
|
+ _UART_BE_ISR();
|
|
if(nStatus & UART_INT_PE) // UART Parity Error
|
|
if(nStatus & UART_INT_PE) // UART Parity Error
|
|
- UART_PE_ISR();
|
|
|
|
|
|
+ _UART_PE_ISR();
|
|
if(nStatus & UART_INT_FE) // UART Framing Error
|
|
if(nStatus & UART_INT_FE) // UART Framing Error
|
|
- UART_FE_ISR();
|
|
|
|
|
|
+ _UART_FE_ISR();
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static bool EnableRxInt(bool bEnable)
|
|
|
|
|
|
+static bool _EnableRxInt(bool bEnable)
|
|
{
|
|
{
|
|
bool bIsEnabled = IS_INT_ENABLED(UART_INT_RX);
|
|
bool bIsEnabled = IS_INT_ENABLED(UART_INT_RX);
|
|
if(bEnable && !bIsEnabled)
|
|
if(bEnable && !bIsEnabled)
|
|
@@ -231,7 +231,7 @@ static bool EnableRxInt(bool bEnable)
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static bool EnableTxInt(bool bEnable)
|
|
|
|
|
|
+static bool _EnableTxInt(bool bEnable)
|
|
{
|
|
{
|
|
bool bIsEnabled = IS_INT_ENABLED(UART_INT_TX);
|
|
bool bIsEnabled = IS_INT_ENABLED(UART_INT_TX);
|
|
if(bEnable && !bIsEnabled)
|
|
if(bEnable && !bIsEnabled)
|
|
@@ -277,7 +277,7 @@ static uint32_t _GetStopbits(int nStopbits)
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-static uint32_t _GetParity(UART_Parity parity)
|
|
|
|
|
|
+static uint32_t _GetParity(GfA_UART_Parity parity)
|
|
{
|
|
{
|
|
switch(parity)
|
|
switch(parity)
|
|
{
|
|
{
|
|
@@ -296,48 +296,50 @@ static uint32_t _GetParity(UART_Parity parity)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-bool MB_UART_Init(LPCUART_CONFIG pCfg)
|
|
|
|
|
|
+bool GfaMbUartInit(LPCGFA_UART_CONFIG pCfg)
|
|
{
|
|
{
|
|
uint32_t nData, nStop, nPar;
|
|
uint32_t nData, nStop, nPar;
|
|
-
|
|
|
|
- if(!pCfg)
|
|
|
|
- return false;
|
|
|
|
- memcpy(&g_uartCfg, pCfg, sizeof(g_uartCfg));
|
|
|
|
|
|
+ GFA_FIFO_BACKEND backend;
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////
|
|
// validate parameters
|
|
// validate parameters
|
|
|
|
|
|
|
|
+ if(!pCfg)
|
|
|
|
+ return false;
|
|
if((nData = _GetDatabits(pCfg->nDatabits)) == (uint32_t)-1)
|
|
if((nData = _GetDatabits(pCfg->nDatabits)) == (uint32_t)-1)
|
|
return false;
|
|
return false;
|
|
if((nStop = _GetStopbits(pCfg->nStopbits)) == (uint32_t)-1)
|
|
if((nStop = _GetStopbits(pCfg->nStopbits)) == (uint32_t)-1)
|
|
return false;
|
|
return false;
|
|
if((nPar = _GetParity(pCfg->parity)) == (uint32_t)-1)
|
|
if((nPar = _GetParity(pCfg->parity)) == (uint32_t)-1)
|
|
return false;
|
|
return false;
|
|
|
|
+ if(pCfg->nFifoIndexTx == pCfg->nFifoIndexRx)
|
|
|
|
+ return false;
|
|
|
|
+
|
|
|
|
+ memcpy(&g_uartCfg, pCfg, sizeof(g_uartCfg));
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////
|
|
// Fifos
|
|
// Fifos
|
|
|
|
|
|
- FIFO_BACKEND backend;
|
|
|
|
-
|
|
|
|
memset(&backend, 0, sizeof(backend));
|
|
memset(&backend, 0, sizeof(backend));
|
|
- backend.pfnLockBackend = EnableTxInt;
|
|
|
|
|
|
+ backend.pfnLockBackend = _EnableTxInt;
|
|
backend.pfnTxPrepare = _OnTxPrepare;
|
|
backend.pfnTxPrepare = _OnTxPrepare;
|
|
backend.pfnTxStart = _OnTxStart;
|
|
backend.pfnTxStart = _OnTxStart;
|
|
backend.pfnTxFinalize = _OnTxFinalize;
|
|
backend.pfnTxFinalize = _OnTxFinalize;
|
|
|
|
|
|
- if(!(g_hFifoTX = FifoCreate(pCfg->nFifoIndexTx, &backend)))
|
|
|
|
|
|
+ if(!(g_hFifoTX = GfaMbFifoCreate(pCfg->nFifoIndexTx, &backend)))
|
|
return false;
|
|
return false;
|
|
|
|
|
|
memset(&backend, 0, sizeof(backend));
|
|
memset(&backend, 0, sizeof(backend));
|
|
- backend.pfnLockBackend = EnableRxInt;
|
|
|
|
|
|
+ backend.pfnLockBackend = _EnableRxInt;
|
|
backend.pfnRxFinalize = _OnRxFinalize;
|
|
backend.pfnRxFinalize = _OnRxFinalize;
|
|
|
|
|
|
- if(!(g_hFifoRX = FifoCreate(pCfg->nFifoIndexRx, &backend)))
|
|
|
|
|
|
+ if(!(g_hFifoRX = GfaMbFifoCreate(pCfg->nFifoIndexRx, &backend)))
|
|
{
|
|
{
|
|
- FifoRelease(g_hFifoTX);
|
|
|
|
|
|
+ GfaMbFifoRelease(g_hFifoTX);
|
|
g_hFifoTX = NULL;
|
|
g_hFifoTX = NULL;
|
|
return false;
|
|
return false;
|
|
}
|
|
}
|
|
@@ -350,7 +352,7 @@ bool MB_UART_Init(LPCUART_CONFIG pCfg)
|
|
/////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////
|
|
// UART
|
|
// UART
|
|
|
|
|
|
- if(pCfg->nBaud)
|
|
|
|
|
|
+ if(pCfg->nBaud <= 19200)
|
|
{
|
|
{
|
|
g_MODBUS_RTU_FRAME_TIMEOUT_US = (350000000 / pCfg->nBaud + 5) / 10;
|
|
g_MODBUS_RTU_FRAME_TIMEOUT_US = (350000000 / pCfg->nBaud + 5) / 10;
|
|
g_MODBUS_RTU_CHAR_TIMEOUT_US = (150000000 / pCfg->nBaud + 5) / 10;
|
|
g_MODBUS_RTU_CHAR_TIMEOUT_US = (150000000 / pCfg->nBaud + 5) / 10;
|
|
@@ -394,7 +396,7 @@ bool MB_UART_Init(LPCUART_CONFIG pCfg)
|
|
|
|
|
|
// Enable the UART interrupt.
|
|
// Enable the UART interrupt.
|
|
IntPrioritySet(UART_INT, MODBUS_RTU_UART_INT_PRIORITY); // priority must be lower than system tick
|
|
IntPrioritySet(UART_INT, MODBUS_RTU_UART_INT_PRIORITY); // priority must be lower than system tick
|
|
- UARTIntRegister(UART_BASE, UART_ISR);
|
|
|
|
|
|
+ UARTIntRegister(UART_BASE, _UART_ISR);
|
|
UARTIntEnable(UART_BASE, (UART_INT_RX | UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE));
|
|
UARTIntEnable(UART_BASE, (UART_INT_RX | UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE));
|
|
|
|
|
|
// Enable the UART.
|
|
// Enable the UART.
|
|
@@ -406,7 +408,7 @@ bool MB_UART_Init(LPCUART_CONFIG pCfg)
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-void MB_UART_Release(void)
|
|
|
|
|
|
+void GfaMbUartRelease(void)
|
|
{
|
|
{
|
|
UARTIntDisable(UART_BASE, UART_INT_RX | UART_INT_TX | UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE);
|
|
UARTIntDisable(UART_BASE, UART_INT_RX | UART_INT_TX | UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE);
|
|
|
|
|
|
@@ -419,34 +421,34 @@ void MB_UART_Release(void)
|
|
|
|
|
|
if(g_hFifoRX)
|
|
if(g_hFifoRX)
|
|
{
|
|
{
|
|
- FifoRelease(g_hFifoRX);
|
|
|
|
|
|
+ GfaMbFifoRelease(g_hFifoRX);
|
|
g_hFifoRX = NULL;
|
|
g_hFifoRX = NULL;
|
|
}
|
|
}
|
|
|
|
|
|
if(g_hFifoTX)
|
|
if(g_hFifoTX)
|
|
{
|
|
{
|
|
- FifoRelease(g_hFifoTX);
|
|
|
|
|
|
+ GfaMbFifoRelease(g_hFifoTX);
|
|
g_hFifoTX = NULL;
|
|
g_hFifoTX = NULL;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-HFIFO MB_UART_GetRxFifo(void)
|
|
|
|
|
|
+HFIFO GfaMbUartGetRxFifo(void)
|
|
{
|
|
{
|
|
return g_hFifoRX;
|
|
return g_hFifoRX;
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-HFIFO MB_UART_GetTxFifo(void)
|
|
|
|
|
|
+HFIFO GfaMbUartGetTxFifo(void)
|
|
{
|
|
{
|
|
return g_hFifoTX;
|
|
return g_hFifoTX;
|
|
}
|
|
}
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-void MB_UART_GetStatusCounters(LPUART_STATUS_COUNTERS pSc)
|
|
|
|
|
|
+void GfaMbUartGetStatusCounters(LPGFA_UART_STATUS_COUNTERS pSc)
|
|
{
|
|
{
|
|
if(pSc)
|
|
if(pSc)
|
|
{
|
|
{
|
|
@@ -459,7 +461,7 @@ void MB_UART_GetStatusCounters(LPUART_STATUS_COUNTERS pSc)
|
|
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
-void MB_UART_ResetStatusCounters(void)
|
|
|
|
|
|
+void GfaMbUartResetStatusCounters(void)
|
|
{
|
|
{
|
|
uint32_t nIrMask = INT_MASK_REGISTER;
|
|
uint32_t nIrMask = INT_MASK_REGISTER;
|
|
UARTIntDisable(UART_BASE, nIrMask);
|
|
UARTIntDisable(UART_BASE, nIrMask);
|