U-Boot BBB avoid LCDC DMA FIFO underflows and Frame Sync lost errors

board/GfA/Display001/uboot_2013.10/uboot-010-lcdc-ddr3-timing.patch

@@ -0,0 +1,77 @@
+diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
+index fa697c7..381b81e 100644
+--- a/arch/arm/cpu/armv7/am33xx/ddr.c
++++ b/arch/arm/cpu/armv7/am33xx/ddr.c
+@@ -57,6 +57,10 @@ void config_sdram(const struct emif_regs *regs, int nr)
+ 	writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
+ 	writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
+ 	writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
++
++	/* Write REG_COS_COUNT_1, REG_COS_COUNT_2, and REG_PR_OLD_COUNT. */
++	if (regs->ocp_config)
++		writel(regs->ocp_config, &emif_reg[nr]->emif_l3_config);
+ }
+ 
+ /**
+diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
+index 1b94a99..ab7d998 100644
+--- a/arch/arm/include/asm/emif.h
++++ b/arch/arm/include/asm/emif.h
+@@ -1115,6 +1115,7 @@ struct emif_regs {
+ 	u32 sdram_tim1;
+ 	u32 sdram_tim2;
+ 	u32 sdram_tim3;
++	u32 ocp_config;
+ 	u32 read_idle_ctrl;
+ 	u32 zq_config;
+ 	u32 temp_alert_config;
+diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
+index b5936d3..5697d8a 100644
+--- a/board/ti/am335x/board.c
++++ b/board/ti/am335x/board.c
+@@ -140,6 +140,16 @@ static const struct emif_regs ddr2_emif_reg_data = {
+ 	.emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
+ };
+ 
++static const struct emif_regs ddr2_evm_emif_reg_data = {
++	.sdram_config = MT47H128M16RT25E_EMIF_SDCFG,
++	.ref_ctrl = MT47H128M16RT25E_EMIF_SDREF,
++	.sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1,
++	.sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2,
++	.sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3,
++	.ocp_config = EMIF_OCP_CONFIG_AM335X_EVM,
++	.emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
++};
++
+ static const struct ddr_data ddr3_data = {
+ 	.datardsratio0 = MT41J128MJT125_RD_DQS,
+ 	.datawdsratio0 = MT41J128MJT125_WR_DQS,
+@@ -245,6 +255,7 @@ static struct emif_regs ddr3_beagleblack_emif_reg_data = {
+ 	.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
+ 	.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
+ 	.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
++	.ocp_config = EMIF_OCP_CONFIG_BEAGLEBONE_BLACK,
+ 	.zq_config = MT41K256M16HA125E_ZQ_CFG,
+ 	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
+ };
+@@ -265,6 +276,7 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
+ 	.sdram_tim1 = MT41J512M8RH125_EMIF_TIM1,
+ 	.sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
+ 	.sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
++	.ocp_config = EMIF_OCP_CONFIG_AM335X_EVM,
+ 	.zq_config = MT41J512M8RH125_ZQ_CFG,
+ 	.emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+ 				PHY_EN_DYN_PWRDN,
+diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h
+index 1bca61d..8b8e814 100644
+--- a/board/ti/am335x/board.h
++++ b/board/ti/am335x/board.h
+@@ -11,6 +11,8 @@
+ #ifndef _BOARD_H_
+ #define _BOARD_H_
+ 
++#define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK       0x00141414
++#define EMIF_OCP_CONFIG_AM335X_EVM             0x003d3d3d
+ /*
+  * TI AM335x parts define a system EEPROM that defines certain sub-fields.
+  * We use these fields to in turn see what board we are on, and what